|
|
PDF NTD12N10 Data sheet ( Hoja de datos )
| Número de pieza | NTD12N10 | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de NTD12N10 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
|
No Preview Available !
NTD12N10
Power MOSFET
12 Amps, 100 Volts
N−Channel Enhancement−Mode DPAK
Features
• Source−to−Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Avalanche Energy Specified
• IDSS and RDS(on) Specified at Elevated Temperature
• Mounting Information Provided for the DPAK Package
• These are Pb−Free Devices
Typical Applications
• PWM Motor Controls
• Power Supplies
• Converters
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol Value
Unit
Drain−to−Source Voltage
Drain−to−Source Voltage (RGS = 1.0 MW)
Gate−to−Source Voltage
− Continuous
− Non−Repetitive (tp ≤ 10 ms)
Drain Current − Continuous @ TA = 25°C
− Continuous @ TA =100°C
− Pulsed (Note 3)
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ TA = 25°C (Note 1)
Total Power Dissipation @ TA = 25°C (Note 2)
Operating and Storage Temperature Range
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
TJ, Tstg
100
100
± 20
± 30
12
7.0
36
56.6
0.38
1.76
1.28
−55 to
+175
Vdc
Vdc
Vdc
Vpk
Adc
Apk
W
W/°C
W
W
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 50 Vdc, VGS = 10 Vdc,
IL = 12 Apk, L = 1.0 mH, RG = 25 W)
EAS 75 mJ
Thermal Resistance
− Junction to Case
− Junction to Ambient (Note 1)
− Junction to Ambient (Note 2)
Maximum Temperature for Soldering
Purposes, 1/8 in from case for 10 seconds
RqJC
RqJA
RqJA
TL
°C/W
2.65
85
117
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using 0.5 sq in pad size.
2. When surface mounted to an FR4 board using the minimum recommended
pad size.
3. Pulse Test: Pulse Width = 10 ms, Duty Cycle = 2%.
http://onsemi.com
V(BR)DSS
100 V
RDS(on) TYP
165 mW @ 10 V
N−Channel
D
ID MAX
12 A
G
S
12
3
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4 DPAK
CASE 369C
(Surface Mount)
STYLE 2
1
Gate
2
Drain
3
Source
1 23
4
DPAK
CASE 369D
(Straight Lead)
STYLE 2
4
Drain
Y
WW
T12N10
G
12 3
Gate Drain Source
= Year
= Work Week
= Device Code
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2010
May, 2010 − Rev. 8
1
Publication Order Number:
NTD12N10/D
Free Datasheet http://www.datasheet4u.com/
1 page  
NTD12N10
20 100
18
16
14 VDS
12
10
8
6 Q1
QT
90
80
70
60
VGS
50
Q2
40
30
4
ID = 12 A
20
2 TJ = 25°C 10
00 2 4 6 8 10 12 140
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
1000
100
10
VDD = 80 V
ID = 12 A
VGS = 10 V
tr
tf
td(off)
td(on)
1
1 10
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN−TO−SOURCE DIODE CHARACTERISTICS
12
VGS = 0 V
10 TJ = 25°C
8
6
4
2
0
0.4 0.5 0.6 0.7 0.8 0.9
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
1
Figure 10. Diode Forward Voltage versus Current
100
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain−to−source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (TC) of 25°C.
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal
Resistance−General Data and Its Use.”
Switching between the off−state and the on−state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded and the
transition time (tr,tf) do not exceed 10 ms. In addition the total
power averaged over a complete switching cycle must not
exceed (TJ(MAX) − TC)/(RqJC).
A Power MOSFET designated E−FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non−linearly with an
increase of peak current in avalanche and peak junction
temperature.
Although many E−FETs can withstand the stress of
drain−to−source avalanche at currents up to rated pulsed
current (IDM), the energy rating is specified at rated
continuous current (ID), in accordance with industry
custom. The energy rating must be derated for temperature
as shown in the accompanying graph (Figure 12). Maximum
energy at currents below rated continuous ID can safely be
assumed to equal the values indicated.
http://onsemi.com
5
Free Datasheet http://www.datasheet4u.com/
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet NTD12N10.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| NTD12N10 | Power MOSFET ( Transistor ) | ON Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |