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PDF NTMD4N03 Data sheet ( Hoja de datos )
| Número de pieza | NTMD4N03 | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
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NTMD4N03, NVMD4N03
Power MOSFET
4 A, 30 V, N−Channel SO−8 Dual
Features
• Designed for use in low voltage, high speed switching applications
• Ultra Low On−Resistance Provides
Higher Efficiency and Extends Battery Life
− RDS(on) = 0.048 W, VGS = 10 V (Typ)
− RDS(on) = 0.065 W, VGS = 4.5 V (Typ)
• Miniature SO−8 Surface Mount Package − Saves Board Space
• Diode is Characterized for Use in Bridge Circuits
• Diode Exhibits High Speed, with Soft Recovery
• NVMD Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable*
• These Devices are Pb−Free and are RoHS Compliant
Applications
• DC−DC Converters
• Computers
• Printers
• Cellular and Cordless Phones
• Disk Drives and Tape Drives
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value
Drain−to−Source Voltage
Gate−to−Source Voltage − Continuous
Drain Current
− Continuous @ TA = 25°C
− Single Pulse (tp ≤ 10 ms)
Total Power Dissipation
@ TA = 25°C (Note 1)
Operating and Storage
Temperature Range
VDSS
VGS
ID
IDM
PD
TJ, Tstg
30
"20
4.0
12
2.0
−55 to
+150
Unit
V
V
Adc
Apk
W
°C
Single Pulse Drain−to−Source
Avalanche Energy − Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 5.0 Vdc,
Peak IL = 4.45 Apk, L = 8 mH,
RG = 25 W)
Thermal Resistance
− Junction−to−Ambient (Note 1)
EAS
RqJA
80 mJ
62.5 °C/W
Maximum Lead Temperature for
Soldering Purposes for 10 seconds
TL 260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using 1″ pad size, t ≤ 10 s
http://onsemi.com
VDSS
30 V
RDS(ON) Typ
48 mW @ VGS = 10 V
ID Max
4.0 A
N−Channel
DD
GG
SS
8
1
SOIC−8
SUFFIX NB
CASE 751
STYLE 11
MARKING DIAGRAM*
AND PIN ASSIGNMENT
D1 D1 D2 D2
8
E4N03
AYWW G
G
1
S1 G1 S2 G2
E4N03 = Specific Device Code
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
NTMD4N03R2G
NVMD4N03R2G*
Package
SOIC−8
(Pb−Free)
SOIC−8
(Pb−Free)
Shipping†
2500 / Tape &
Reel
2500 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D
© Semiconductor Components Industries, LLC, 2013
August, 2013 − Rev. 4
1
Publication Order Number:
NTMD4N03R2/D
Free Datasheet http://www.datasheet4u.com/
1 page  
NTMD4N03, NVMD4N03
10
QT
30
8 VGS
6
VDS
4 Q1
Q2
2
20
ID = 4 A
TJ = 25°C
10
00 1
23
4
5
6
7
8
0
9 10
Qg, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
100
VDD = 15 V
ID = 4 A
VGS = 10 V
10
td(off)
tf
tr
td(on)
1
1 10 100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
DRAIN−TO−SOURCE DIODE CHARACTERISTICS
The switching characteristics of a MOSFET body diode
are very important in systems using it as a freewheeling or
commutating diode. Of particular interest are the reverse
recovery characteristics which play a major role in
determining switching losses, radiated noise, EMI and RFI.
System switching losses are largely due to the nature of
the body diode itself. The body diode is a minority carrier
device, therefore it has a finite reverse recovery time, trr, due
to the storage of minority carrier charge, QRR, as shown in
the typical reverse recovery wave form of Figure 14. It is this
stored charge that, when cleared from the diode, passes
through a potential and defines an energy loss. Obviously,
repeatedly forcing the diode through reverse recovery
further increases switching losses. Therefore, one would
like a diode with short trr and low QRR specifications to
minimize these losses.
The abruptness of diode reverse recovery effects the
amount of radiated noise, voltage spikes, and current
ringing. The mechanisms at work are finite irremovable
circuit parasitic inductances and capacitances acted upon by
4
VGS = 0 V
TJ = 25°C
3
high di/dts. The diode’s negative di/dt during ta is directly
controlled by the device clearing the stored charge.
However, the positive di/dt during tb is an uncontrollable
diode characteristic and is usually the culprit that induces
current ringing. Therefore, when comparing diodes, the
ratio of tb/ta serves as a good indicator of recovery
abruptness and thus gives a comparative estimate of
probable noise generated. A ratio of 1 is considered ideal and
values less than 0.5 are considered snappy.
Compared to ON Semiconductor standard cell density
low voltage MOSFETs, high cell density MOSFET diodes
are faster (shorter trr), have less stored charge and a softer
reverse recovery characteristic. The softness advantage of
the high cell density diode means they can be forced through
reverse recovery at a higher di/dt than a standard cell
MOSFET diode without increasing the current ringing or the
noise generated. In addition, power dissipation incurred
from switching the diode will be less due to the shorter
recovery time and lower switching losses.
2
1
0
0.5 0.6 0.7 0.8 0.9
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
http://onsemi.com
5
Free Datasheet http://www.datasheet4u.com/
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet NTMD4N03.PDF ] | |
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