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Analog Devices - 700 MHz to 1050 MHz Quadrature Demodulator

Numéro de référence ADRF6807
Description 700 MHz to 1050 MHz Quadrature Demodulator
Fabricant Analog Devices 
Logo Analog Devices 





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ADRF6807 fiche technique
Data Sheet
700 MHz to 1050 MHz Quadrature
Demodulator with Fractional-N PLL
ADRF6807
FEATURES
GENERAL DESCRIPTION
IQ demodulator with integrated fractional-N PLL
LO frequency range: 700 MHz to 1050 MHz
For the following specifications (LPEN = 0)/(LPEN = 1):
Input P1dB: 12.8 dBm/11.7 dBm
Input IP3: 26.7 dBm/24.0 dBm
Noise figure (DSB): 13.1 dB/12.4 dB
Voltage conversion gain: 1.0 dB/4.3 dB
Quadrature demodulation accuracy
Phase accuracy: <0.5°
Amplitude accuracy: <0.1 dB
Baseband demodulation: 170 MHz/135 MHz, 3 dB
bandwidth
SPI serial interface for PLL programming
40-lead, 6 mm × 6 mm LFCSP
APPLICATIONS
QAM/QPSK RF/IF demodulators
Cellular W-CDMA/CDMA/CDMA2000
Microwave point-to-(multi)point radios
Broadband wireless and WiMAX
The ADRF6807 is a high dynamic range IQ demodulator with
integrated phase-locked loop (PLL) and voltage controlled
oscillator (VCO). The fractional-N PLL/synthesizer generates a
frequency in the range of 2.8 GHz to 4.2 GHz. A programmable
quadrature divider (divide ratio = 4) divides the output frequency
of the VCO down to the required local oscillator (LO) frequency to
drive the mixers in quadrature. Additionally, an output divider
(divide ratio = 4 to 8) generates a divided-down VCO signal for
external use.
The PLL reference input is supported from 9 MHz to 160 MHz.
The phase detector output controls a charge pump whose output
is integrated in an off-chip loop filter. The loop filter output is
then applied to an integrated VCO.
The IQ demodulator mixes the differential RF input with the
complex LO derived from the quadrature divider. The differential
I and Q output paths have excellent quadrature accuracy and
can handle baseband signaling or complex IF up to 120 MHz.
A reduced power mode of operation is also provided by
programming the serial interface registers to reduce current
consumption, with slightly degraded input linearity and output
current drive.
The ADRF6807 is fabricated using an advanced silicon-germanium
BiCMOS process. It is available in a 40-lead, exposed paddle,
RoHS-compliant, 6 mm × 6 mm LFCSP package. Performance is
specified over the −40°C to +85°C temperature range.
LON 37
LOP 38
GND 11
DATA 12
CLK 13
LE 14
GND 15
REFIN 6
GND 7
MUXOUT 8
GND VCCLO VCCLO
35 34
17
FUNCTIONAL BLOCK DIAGRAM
LOSEL
36
BUFFER
CTRL
BUFFER
DIV
÷4,
÷6,
÷8
ADRF6807
FRACTION
REG
MODULUS
INTEGER
REG
BUFFER
MUX
DIVIDER
÷2
IBBP
33
IBBN GND
32 31
30 GND
29 DECL3
28 VCCRF
27 GND
SPI
INTERFACE
×2
MUX
÷2
÷4
THIRD-ORDER
FRACTIONAL
INTERPOLATOR
N COUNTER
PRESCALER
÷2
VCO
CORE
QUAD
÷2
26 RFIN
25 RFIP
TEMP
SENSOR
+
PHASE
FREQUENCY
DETECTOR
CHARGE PUMP
250µA,
500µA (DEFAULT),
750µA,
1000µA
2.5V LDO
VCO LDO
24 GND
23 VOCM
22 VCCBB
21 GND
1
VCC1
2
VCC1
34
5
9 10 39
40
16
CPOUT GND RSET DECL2 VCC2 VTUNE DECL1 GND
18 19 20
QBBP QBBN GND
Figure 1.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2011–2012 Analog Devices, Inc. All rights reserved.
Free Datasheet http://www.datasheet4u.com/

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