ADM3490 Datasheet PDF - Analog Devices
| Part Number | ADM3490 | |
| Description | (ADM3483 - ADM3491) RS-485/RS-422 Transceivers | |
| Manufacturers | Analog Devices | |
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Data Sheet
3.3 V Slew Rate Limited, Half- and
Full-Duplex, RS-485/RS-422 Transceivers
ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
FEATURES
Operate with 3.3 V supply
Interoperable with 5 V logic
EIA RS-422 and RS-485 compliant over full
common-mode range
Data rate options
ADM3483/ADM3488: 250 kbps
ADM3485/ADM3490/ADM3491: 10 Mbps
Half- and full-duplex options
Reduced slew rates for low EMI (ADM3483 and ADM3488)
2 nA supply current in shutdown mode
(ADM3483/ADM3485/ADM3491)
Up to 32 transceivers on the bus
−7 V to +12 V bus common-mode range
Specified over the –40°C to +85°C temperature range
8 ns skew (ADM3485/ADM3490/ADM3491)
8-lead SOIC and 14-lead SOIC (ADM3491 only) packages
APPLICATIONS
Low power RS-485/RS-422 applications
Telecom
Industrial process control
HVAC
GENERAL DESCRIPTION
The ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 are
low power, differential line transceivers designed to operate using a
single 3.3 V power supply. Low power consumption, coupled with a
shutdown mode, makes the ADM3483/ADM3485/ADM3488/
ADM3490/ADM3491 ideal for power-sensitive applications.
The ADM3488/ADM3490/ADM3491 feature full-duplex com-
munication, while the ADM3483/ADM3485 are designed for
half-duplex communication.
The ADM3483/ADM3488 feature slew rate limited drivers that
minimize EMI and reduce reflections caused by improperly ter-
minated cables, allowing error-free data transmission at data rates
up to 250 kbps.
The ADM3485/ADM3490/ADM3491 transmit at up to 10 Mbps.
The receiver input impedance is 12 kΩ, allowing up to 32 trans-
ceivers to be connected on the bus. A thermal shutdown circuit
prevents excessive power dissipation caused by bus contention or
by output shorting. If a significant temperature increase is detected
FUNCTIONAL BLOCK DIAGRAMS
VCC
ADM3483/
ADM3485
RO R
RE
DE
DI D
A
B
GND
Figure 1.
VCC
RO R
A
ADM3488/
ADM3490
B
Z
DI D
Y
GND
Figure 2.
ADM3491
RO R
A
RE B
DE
DI D
Z
Y
Figure 3.
in the internal driver circuitry during fault conditions, then the
thermal shutdown circuit forces the driver output into a high
impedance state. If the inputs are unconnected (floating), the
receiver contains a fail-safe feature that results in a logic high
output state. The parts are fully specified over the commercial
and industrial temperature ranges. The ADM3483/ADM3485/
ADM3488/ADM3490 are available in 8-lead SOIC_N; the
ADM3491 is available in a 14-lead SOIC_N.
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2005-2011 Analog Devices, Inc. All rights reserved.
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Data Sheet
ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
TIMING SPECIFICATIONS—ADM3485/ADM3490/ADM3491
VCC = 3.3 V, TA = 25°C, unless otherwise noted.
Table 3.
Parameter
Min Typ
DRIVER
Differential Output Delay (tDD)
1 22
Differential Output Transition Time (tTD)
38
Propagation Delay, Low-to-High Level (tPLH)
7 22
Propagation Delay, High-to-Low Level (tPHL)
7 22
|tPLH – tPHL| Propagation Delay Skew1 (tPDS)
DRIVER OUTPUT ENABLE/DISABLE TIMES (ADM3485/
ADM3491 ONLY)
Output Enable Time to Low Level (tPZL)
45
Output Enable Time to High Level (tPZH)
45
Output Disable Time from High Level (tPHZ)
40
Output Disable Time from Low Level (tPLZ)
40
Output Enable Time from Shutdown to Low Level (tPSL)
650
Output Enable Time from Shutdown to High Level (tPSH)
650
1 Measured on |tPLH (Y) − tPHL (Y)| and |tPLH (Z) − tPHL (Z)|.
Max
35
25
35
35
8
90
90
80
80
900
900
Unit Test Conditions/Comments
ns RL = 60 Ω (see Figure 20 and Figure 26)
ns RL = 60 Ω (see Figure 20 and Figure 26)
ns RL = 27 Ω (see Figure 21 and Figure 27)
ns RL = 27 Ω (see Figure 21 and Figure 27)
ns RL = 27 Ω (see Figure 21 and Figure 27)
ns RL = 110 Ω (see Figure 23 and Figure 29)
ns RL = 110 Ω (see Figure 22 and Figure 28)
ns RL = 110 Ω (see Figure 22 and Figure 28)
ns RL = 110 Ω (see Figure 23 and Figure 29)
ns RL = 110 Ω (see Figure 23 and Figure 29)
ns RL = 110 Ω (see Figure 22 and Figure 28)
TIMING SPECIFICATIONS—ADM3483/ADM3488
VCC = 3.3 V, TA = 25°C, unless otherwise noted.
Table 4.
Parameter
DRIVER
Differential Output Delay (tDD)
Differential Output Transition Time (tTD)
Propagation Delay, Low-to-High Level (tPLH)
Propagation Delay, High-to-Low Level (tPHL)
|tPLH – tPHL| Propagation Delay Skew1 (tPDS)
DRIVER OUTPUT ENABLE/DISABLE TIMES (ADM3483 ONLY)
Output Enable Time to Low Level (tPZL)
Output Enable Time to High Level (tPZH)
Output Disable Time from High Level (tPHZ)
Output Disable Time from Low Level (tPLZ)
Output Enable Time from Shutdown to Low Level (tPSL)
Output Enable Time from Shutdown to High Level (tPSH)
Min
600
400
700
700
1 Measured on |tPLH (Y) − tPHL (Y)| and |tPLH (Z) − tPHL (Z)|.
Typ Max Unit Test Conditions/Comments
900
700
1000
1000
100
1400
1200
1500
1500
ns
ns
ns
ns
ns
RL = 60 Ω (see Figure 20 and Figure 26)
RL = 60 Ω (see Figure 20 and Figure 26)
RL = 27 Ω (see Figure 21 and Figure 27)
RL = 27 Ω (see Figure 21 and Figure 27)
RL = 27 Ω (see Figure 21 and Figure 27)
900 1300 ns
600 800 ns
50 80 ns
50 80 ns
1.9 2.7 μs
2.2 3.0 μs
RL = 110 Ω (see Figure 23 and Figure 29)
RL = 110 Ω (see Figure 22 and Figure 28)
RL = 110 Ω (see Figure 22 and Figure 28)
RL = 110 Ω (see Figure 23 and Figure 29)
RL = 110 Ω (see Figure 23 and Figure 29)
RL = 110 Ω (see Figure 22 and Figure 28)
Rev. E | Page 5 of 20
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