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AVAGO - 5 MBd Digital CMOS Optocoupler

Numéro de référence ACPL-M21L
Description 5 MBd Digital CMOS Optocoupler
Fabricant AVAGO 
Logo AVAGO 





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ACPL-M21L fiche technique
ACPL-M21L, ACPL-021L and ACPL-024L
Low Power, 5 MBd Digital CMOS Optocoupler
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
Features
ACPL-M21L (single channel SO-5 package), ACPL-021L
(single channel SO-8 package) and ACPL-024L (dual
channel SO-8 package) are optically-coupled logic gates.
The detector IC has CMOS output stage and optical
receiver input stage with built-in Schmitt trigger to
provide logic-compatible waveforms, eliminating the
need for additional waveshaping.
An internal shield on the ACPL-M21L/021L/024L guar-
antees common mode transient immunity of 25 kV/μs
at a common mode voltage of 1000 V. The ACPL-x2xL
optocouplers' series operates from a 2.7 to 5.5 V
supply with guaranteed AC and DC performance from an
extended temperature range of -40° C to 105° C. Glitches
free output upon power-up and power-down of optocou-
pler.
 CMOS output
 Wide supply voltage: 2.7 V – 5.5 V
 Low power supply current IDD: ≤ 1.1 mA max
 Low forward current IF: 1.6 mA min
 Speed: 5 MBd typ
 Pulse width distortion (PWD): 200 ns max
 Propagation delay skew (tpsk): 220 max
 Propagation delay (tp): 250 ns max
 Common mode rejection: 25 kV/s min at VCM = 1000 V
 Hysteresis: 0.2 mA typ
 Temperature range: -40° C to 105° C
 Safety and regulatory approvals
Functional Diagram
Anode 1
6 VDD
5 VO
Cathode 3 Shield
4 GND
ACPL-M21L
TRUTH TABLE
(POSITIVE LOGIC)
LED VO
ON HIGH
OFF LOW
NC 1 8 VDD
Anode 2
7 VO
Cathode 3
NC 4
Shield
ACPL-021L
6 NC
5 GND
Anode1 1
8 VDD
Cathode1 2
7 V01
Cathode2 3
6 V02
Anode2 4
Shield
5 GND
ACPL-024L
A 0.1 F bypass capacitor must be connected between pins Vdd and GND
– UL 1577 recognized – 3750 Vrms for 1 minute for
ACPL-M21L/021L/024L
– CSA Approval
– IEC/EN 60747-5-5, Approval for Reinforced Insulation
Applications
 Low isolation of high speed logic systems
 Computer peripheral interface
 Microprocessor system interface
 Ground loop elimination
 Pulse transformer replacement
 High speed line receiver
 Power control systems
Free Datasheet http://www.datasheet4u.com/

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