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PDF ACC2087 Data sheet ( Hoja de datos )
| Número de pieza | ACC2087 | |
| Descripción | ENHANCED SUPER CHIP | |
| Fabricantes | ACC Microelectronics | |
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Hay una vista previa y un enlace de descarga de ACC2087 (archivo pdf) en la parte inferior de esta página. Total 70 Páginas | ||
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2087
ACC2087
ENHANCED SUPER CHIP
DATA BOOK
ADVANCED INFORMATION
AUGUST 1996
Revision 1.1
ACC Microelectronics Corporation, 2500 Augustine Drive, Santa Clara, CA 95054
Phone: (408) 980-0622 Fax: (408) 980-0626
This datasheet has been downloaded from http://www.digchip.com at thisFrpeeaDgaetasheet http://www.datasheet4u.com/
1 page  
ACC MicroTM
2087
Section 1
Introduction
1.1 2087 Features
Supports Intel iDX4, AMD AM486, Cyrix 5x86, TI 486s, and IBM Blue Lightning microprocessor with
operation up to 50 MHz
3.3V / 5.0V mixed voltage system design
Level 1 Write Back Cache
Level 2 Cache Controller
- Support either write back or write through implementation
- Up to 2 MB in cache size
High Performance DRAM Controller
- Supports four banks of 32-bit DRAM, Fast Page Mode only, allowing up to 64 MB memory
Integrated Peripheral Controller: 2 x 8237, 2 x 8259, 1 x 8254, 1 x 74612
Integrated Floppy Disk Controller supports two floppy disk drives
Supports one IDE interface
Supports two high speed 16C550 compatible UARTs with 16 Byte FIFOs
Supports one bi-directional Parallel port with ECP mode
Support PPM mode where Floppy Disk Drive can be used on Parallel Port
PS/2 compatible Keyboard Controller and Mouse
Power Management Control
- Power-On Suspend
- Power-Off Suspend
- Doze / Idle Detection
- Suspend / resume Button
- APM support
- SMM / SMI
- Stop Clock Protocol
- Battery monitoring signal and dedicated low-battery warning alarm
Supports Flash EPROM
Local Bus IDE
Fast reset / Fast gate A20 (Port 92)
256-pin PQFP device
1
Free Datasheet http://www.datasheet4u.com/
5 Page 
ACC MicroTM
2087
2.6 Clock Throttling:
To further reduce the power consumption in the Notebook system, the ACC2087 supports another mode called
Clock Throttling. After scaling the CPU clock, the ACC2087 can periodically assert the STPCLK# request
which will force the CPU into Stop Grant State. Hence the CPU power can be further reduced.
2.7 Local Bus Peripheral Support
Master / DMA Mode and SMM Support in Local Bus Cycle
The ACC2087 supports VL-Bus with master and DMA modes. To further enhance the flexibility, the local bus
can be detected under System Management Mode (SMM).
The ACC2087 determines whether the cycle is a local bus cycle or not by detecting the existence of the local
bus cycle signal, signaled by a local bus device. When the ACC2087 Register 1Bh, bit 4, is set to one, pin 127
(READY0#, LBA#) becomes the LBA# pin. This pin is connected to the local bus device's local bus
acknowledge signal. When LBA# is asserted low, the ACC2087 will terminate all the bus cycles, and
relinquish the control to the local bus. The ACC2087 starts to sense the LBA# pin status from the end of T1
until the beginning of the ENABUS# as shown below.
Local Bus Detection
7
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 70 Páginas | |
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