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PDF TISP61089 Data sheet ( Hoja de datos )
| Número de pieza | TISP61089 | |
| Descripción | DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS | |
| Fabricantes | Bourns | |
| Logotipo |  |
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TISP61089D, TISP61089SD, TISP61089AD,
TISP61089ASD, TISP61089P, TISP61089AP
DUAL FORWARD-CONDUCTING P-GATE THYRISTORS
PROGRAMMABLE OVERVOLTAGE PROTECTORS
TISP61089 Gated Protector Series
Overvoltage Protection for Negative Rail SLICs
Dual Voltage-Tracking Protectors
- ‘61089 for Battery Voltages to ......................................... -75 V
- ‘61089A for Battery Voltages to ..................................... -100 V
- Low Gate Triggering Current ....................................... < 5 mA
- High Holding Current ............................................... > 150 mA
Rated for GR-1089-CORE and K.44 Impulses
Impulse Wave Shape IPPSM
Voltage Current A
2/10
2/10 120
10/700 5/310 40
10/1000 10/1000 30
2/10 Overshoot Voltage Specified
Ele ment
Diode
SCR
IPP = 100 A, 2/ 10
V
8
12
Package Options
- Surface Mount 8-pin Small-Outline
Line Feed-Thru Connection (D)
Shunt Version Connection (SD)
- Through-Hole 8-pin DIP (P)
..................................................... UL Recognized Components
D Package, P Package Top Views and Device Symbol for Feed-Thru Pin-Out
(Tip) K1 1
8 K1 (Tip)
K1
(Gate) G 2
7 A (Ground)
NC 3
6 A (Ground)
(Ring) K2 4
5 K2 (Ring)
MD6XBD
NC - No internal connection
Terminal typical application names shown in
parenthesis
G
K2
K1
A
A
K2
SD6XAEB
D Package Top View and Device Symbol for Shunt (SD) Pin-Out
(Tip) K1
1
8 NC
(Gate) G
2
7 A (Ground)
NC 3
6 A (Ground)
(Ring) K2
4
5 NC
MD6XBE
NC - No internal connection
Terminal typical application names shown in
parenthesis
How To Order
K1
G
K2
A
A
SD6XAU
Device
Package
Carrier
TISP61089
D (Small-Outline)
R†
Tube
TISP61089S D (Small-Outline)
R†
Tube
TISP61089
P (8-pin DIP)
Tube
† Carrier R is Embossed Tape Reeled
Order as
TISP61089DR
TISP61089D
TISP61089SDR
TISP61089SD
TISP61089P
Device
Package
Carrier
TISP61089A
D (Small-Outline)
R†
Tube
TISP61089AS D (Small-Outline)
R†
Tube
TISP61089A
P (8-pin DIP)
Tube
† Carrier R is Embossed Tape Reeled
Order as
TISP61089ADR
TISP61089AD
TISP61089ASDR
TISP61089ASD
TISP61089AP
NOVEMBER 1995 - REVISED AUGUST 2002
Specifications are subject to change without notice.
1
Free Datasheet http://www.datasheet4u.com/
1 page  
TISP61089 Gated Protector Series
Thermal Information
20
15
10
8
7
6
5
4
3
2
1.5
1
0.8
0.7
0.6
0.5
0.01
PEAK NON-RECURRING AC
vs
CURRENT DURATION TI61AFA
RING AND T IP TERM INALS:
Equal ITSM values applied
simultaneously
GROUND TERM INAL:
Current twice ITSM value
EIA /JESD51
Environment and
PCB, TA = 25 °C
VGG = -80 V
VGG = -60 V
VGG = -100 V
0.1 1 10 100
t — Current Duration — s
1000
Figure 2. Non-repetitive Peak On-State Current against Duration
(Gate Voltage Ranges are -20 V to -75 V for the '61089 and -20 V to -100 V for the '61089A)
NOVEMBER 1995 - REVISED AUGUST 2002
Specifications are subject to change without notice.
5
Free Datasheet http://www.datasheet4u.com/
5 Page 
TISP61089 Gated Protector Series
MECHANICAL DATA
P008 Plastic Dual-In-Line Package
This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will
withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high
humidity conditions The package is intended for insertion in mounting-hole rows on 7.62 (0.300) centers. Once the leads are compressed and
inserted, sufficient tension is provided to secure the package in the board during soldering. Leads require no additional cleaning or processing
when used in soldered assembly.
P008
9.25 - 9.75
(.364 - .384)
8765
Ind ex
Notch
6.10 - 6.60
(.240 - .260)
1234
1.78
(.070)
MAX.
4 Places
5.08
(.200)
MAX.
0.51
(.020)
MIN.
3.17 MIN.
(.125)
Seating
Plane
7.62 - 8.23
(.300 - .324)
0.20 - 0.36
(.008 - .014)
0.38 - 0.53
(.015 - .021)
8 Places
DIMENSIONS ARE: MILLIMETERS
(INCHES)
2.54
(.100)
TYP.
(see Note A)
6 Places
8.38 - 9.40
(.330 - .370)
MDXXCF
NOTES: A. Each pin centerline is located within 0.25 (0.010) of its true longitudinal position.
B. Dimensions fall within JEDEC MS001 - R-PDIP-T, 0.300" Dual-In-Line Plastic Family.
C. Details of the previous dot index P008 package style, drawing reference MDXXABA, are given in the earlier publications.
NOVEMBER 1995 - REVISED AUGUST 2002
Specifications are subject to change without notice.
11
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet TISP61089.PDF ] | |
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| TISP61089A | DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS | Power Innovations Limited |
| TISP61089AS | DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS | Power Innovations Limited |
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