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PDF IDTCV122C Data sheet ( Hoja de datos )
| Número de pieza | IDTCV122C | |
| Descripción | CLOCK | |
| Fabricantes | Integrated Device Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de IDTCV122C (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
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IDTCV122C
PROGRAMMABLEFLEXPC™ CLOCKFORP4PROCESSOR
COMMERCIALTEMPERATURERANGE
PROGRAMMABLE FLEXPC™
CLOCK FOR P4 PROCESSOR
IDTCV122C
FEATURES:
• One high precision N Programming PLL for CPU
• One high precision N Programming PLL for SRC/PCI
• One high precision PLL for SATA
• One high precision PLL for 96MHz/48MHz
• Band-gap circuit for differential outputs
• Support multiple spread spectrum modulation, down and
center
• Support I2C block read/write, index read/write
• Selectable output strength for REF, PCI, and 48MHz
• Available in SSOP package
KEY SPECIFICATION:
• CPU/SRC CLK cycle to cycle jitter < 85ps
• SATA CLK cycle to cycle jitter < 85ps
• Static PLL frequency divide error = 0 ppm
DESCRIPTION:
IDTCV122C is a 56 pin clock device, complying the latest Intel CK410
requirements, for Intel advance P4 processors. The CPU output buffer is
designed to support up to 400MHz processor. One dedicated PLL for Serial
ATA clock provides high accuracy frequency. This device also implements
Band-gap referenced IREF to reduce the impact of VDD variation on differential
outputs, which can provide more robust system performance.
Each CPU/SRC/PCI, SATA clock has its own Spread Spectrum selection,
which allows for isolated changes instead of affecting other clock groups.
Not recommended for new designs.
The last time buy for this product is 12/17/2010.
Please refer to PDN K-10-15.
FUNCTIONAL BLOCK DIAGRAM
SATA PLL
SCC
14.318MHz
Osc
PCIEX PLL
SCC
N Programming
CPU PLL
SCC
N Programming
SATA/
PCI/
SRC4 - SATA
PCI[5:0], PCIF[2:0]
PCIE/
Host/
MUX
SRC[6:5] [3:1]
CPU_ITP/
SRC7
CPU[1:0]
48MHz/
USB48
24_48MHz
Fixed PLL
No SCC
96MHz/
OUTPUT TABLE
CPU CPU_ITP/SRC
21
SRC
5
SATA
1
PCI/PCIF REF/PCI
81
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
© 2010 Integrated Device Technology, Inc.
1
REF
1
DOT96
1
DOT96
REF[1:0]
RESET
24_48MHz
2
RESET
1
TURBO
1
JULY 2010
DSC - 6590/5
Free Datasheet http://www.datasheet4u.com/
1 page  
IDTCV122C
PROGRAMMABLEFLEXPC™ CLOCKFORP4PROCESSOR
CB1_[2:0], CB2_[2:0], CPU MODE
SELECTION
CB[2:0]
CPU Mode, MHz
101 100
001 133
011 166
010 200
000 266
100 333
110 400
111 RESERVE
COMMERCIALTEMPERATURERANGE
RESOLUTION
CPU = 100MHz mode
CPU = 133MHz mode
CPU = 166MHz mode
CPU = 200MHz mode
CPU = 266MHz mode
CPU = 333MHz mode
CPU = 400MHz mode
SRC (PCI Express)
N Resolution (MHz)
0.666667
0.888889
1.333333
1.333333
2.666667
2.666667
2.666667
0.666667
%
0.67%
0.67%
0.8%
0.67%
1.00%
0.8%
0.67%
0.67%
N=
150
150
125
150
100
125
150
150
SSC MAGNITUDE CONTROL
SMC[2:0]
000
001
010
011
100
101
110
111
%
OFF
- 0.25
- 0.5
±0.125
±0.25
±0.375
±0.5
±0.75
PCI
When Byte5 bit6 = 0
PCIS[1:0]
00
01
10
11
PCI
33.33
36.36
40
S_CBS[1:0], H_CBS[1:0] BAND
SELECTION
CBS[1:0]
00
01
10
11
FS[C,B,A]
CB1_[2:0]
CB2_[2:0]
Don’t care
S_CNS, S_PNS, H_CNS,H_PNS N
SELECTION
NS[1:0]
00
01
10
11
Standard of Each CPU Mode (Band)
N Selection 1
N Selection 2
Don’t care
S.E. CLOCK STRENGTH SELECTION (PCI, REF, USB48)
Str[1:0]
00
01
10
11
2L
1H
1L
2H
Multiple loads
Recommend
Recommend
Single loads
Recommend
Recommend
USB48
Recommend
Recommend
5
Free Datasheet http://www.datasheet4u.com/
5 Page 
IDTCV122C
PROGRAMMABLEFLEXPC™ CLOCKFORP4PROCESSOR
BYTE 28
Bit
7
6
5
4
3
2
1
0
Output(s) Affected
TCN7
TCN6
TCN5
TCN4
TCN3
TCN2
TCN1
TCN0 (LSB)
Description / Function
Turbo CPU PLL N setting
CPU Frequency = N * Resolution
(see Resolution table)
0
COMMERCIALTEMPERATURERANGE
1 Type Power On
RW 1
RW 0
RW 0
RW 1
RW 0
RW 1
RW 1
RW 0
BYTE 29
Bit
7
6
5
4
3
2
1
0
Output(s) Affected
TPN8 (MSB)
TPN7
TPN6
TPN5
TPN4
TPN3
TPN2
TPN1
Description / Function
Turbo SRC PLL N setting
SRC Frequency = N * Resolution
Resolution = 0.666667
0
1 Type Power On
0
1
0
0
1
0
1
1
BYTE 30
Bit
7
6
5
Output(s) Affected
TPN0 (LSB)
Description / Function
Test Mode entry control
4 Only valid when Byte6 bit5 is high
3
PCI4/Turbo
PCI4/Turbo Mode select
2 Turbo
1
Test_scl
On chip test mode enable
0 Test_hiz CLK outputs enable
0
Normal operation
Hi-Z
Turbo
Disable
normal
normal
1 Type
Test mode,
controlled by byte 30 bit 4
REF/N mode
PCI4
Enable
SCLK=1, CLK outputs=1
SCLK=0, CLK outputs=0
CLK outputs=Tristate
RW
RW
RW
RW
Power On
0
0
0
0
0
0
0
11
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet IDTCV122C.PDF ] | |
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