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PDF ADG1212-EP Data sheet ( Hoja de datos )
| Número de pieza | ADG1212-EP | |
| Descripción | iCMOS Quad SPST Switches | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Enhanced Product
Low Capacitance, Low Charge Injection,
±15 V/+12 V iCMOS Quad SPST Switches
ADG1212-EP
FEATURES
1 pF off capacitance
2.6 pF on capacitance
<1 pC charge injection
33 V supply range
120 Ω on resistance
Fully specified at ±15 V, +12 V
No VL supply required
3 V logic-compatible inputs
Rail-to-rail operation
16-lead TSSOP
Typical power consumption: <0.03 μW
ENHANCED PRODUCT FEATURES
Supports defense and aerospace applications (AQEC
standard)
Military temperature range: −55°C to +125°C
Controlled manufacturing baseline
One assembly/test site
One fabrication site
Enhanced product change notification
Qualification data available on request
APPLICATIONS
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Audio signal routing
Video signal routing
Communication systems
GENERAL DESCRIPTION
The ADG1212-EP is a monolithic complementary metal-oxide
semiconductor (CMOS) device containing four independently
selectable switches designed on an iCMOS® (industrial CMOS)
process. iCMOS is a modular manufacturing process combining
high voltage CMOS and bipolar technologies. It enables the
development of a wide range of high performance analog ICs
capable of 33 V operation in a footprint that no previous generation
of high voltage parts has been able to achieve. Unlike analog
ICs using conventional CMOS processes, iCMOS components
can tolerate high supply voltages while providing increased
performance, dramatically lower power consumption, and
reduced package size.
FUNCTIONAL BLOCK DIAGRAM
S1
IN1
D1
S2
IN2
ADG1212-EP D2
S3
IN3
D3
S4
IN4
D4
NOTES
1. SWITCHES SHOWN ARE
FOR LOGIC 1 INPUT.
Figure 1.
The ultralow capacitance and charge injection of this switch
makes it an ideal solution for data acquisition and sample-and-
hold applications, where low glitch and fast settling are required.
Fast switching speed coupled with high signal bandwidth makes
the part suitable for video signal switching.
iCMOS construction ensures ultralow power dissipation, making
the part ideally suited for portable and battery-powered instruments.
The ADG1212-EP contains four independent single-pole/
single-throw (SPST) switches. Each switch conducts equally
well in both directions when on and has an input signal range
that extends to the supplies. In the off condition, signal levels up
to the supplies are blocked.
Additional application and technical information can be found
in the ADG1212 data sheet.
PRODUCT HIGHLIGHTS
1. Ultralow capacitance.
2. <1 pC charge injection.
3. 3 V logic compatible digital inputs: VIH = 2.0 V, VIL = 0.8 V.
4. No VL logic power supply required.
5. Ultralow power dissipation: <0.03 μW.
6. 16-lead TSSOP package.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
Free Datasheet http://www.datasheet4u.com/
1 page  
Enhanced Product
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
VDD to VSS
VDD to GND
VSS to GND
Analog Inputs1
Digital Inputs1
Peak Current, S or D
Continuous Current per Channel, S or D
Operating Temperature Range
Storage Temperature Range
Junction Temperature
16-Lead TSSOP, θJA Thermal
Impedance (4-Layer Board)
Lead Temperature, Soldering
Rating
35 V
−0.3 V to +25 V
+0.3 V to −25 V
VSS − 0.3 V to VDD + 0.3 V
or 30 mA, whichever
occurs first
GND – 0.3 V to
VDD + 0.3 V or 30 mA,
whichever occurs first
100 mA (pulsed at
1 ms, 10% duty cycle
maximum)
25 mA
−40°C to +125°C
−65°C to +150°C
150°C
112°C/W
As per JEDEC J-STD-020
1 Overvoltages at IN, S, or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
ADG1212-EP
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational section of
this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Only one absolute maximum rating may be applied at any
one time.
Table 4. ADG1212-EP Truth Table
ADG1212-EP INx
Switch Condition
1 On
0 Off
ESD CAUTION
Rev. 0 | Page 5 of 12
Free Datasheet http://www.datasheet4u.com/
5 Page 
Enhanced Product
OUTLINE DIMENSIONS
5.10
5.00
4.90
16 9
4.50
4.40
4.30
1
6.40
BSC
8
PIN 1
1.20
0.15
MAX
0.20
0.05 0.09
0.65
BSC
0.30
0.19
COPLANARITY
0.10
SEATING
PLANE
8°
0°
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 20. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
0.75
0.60
0.45
ORDERING GUIDE
Model
ADG1212SRU-EP-RL7
Temperature Range
−55°C to +125°C
Package Description
16-Lead Thin Shrink Small Outline Package [TSSOP]
ADG1212-EP
Package Option
RU-16
Rev. 0 | Page 11 of 12
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet ADG1212-EP.PDF ] | |
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