DataSheet.es    


PDF AF82801 Data sheet ( Hoja de datos )

Número de pieza AF82801
Descripción I/O Controller Hub 10
Fabricantes Intel 
Logotipo Intel Logotipo



Hay una vista previa y un enlace de descarga de AF82801 (archivo pdf) en la parte inferior de esta página.


Total 70 Páginas

No Preview Available ! AF82801 Hoja de datos, Descripción, Manual

Intel® I/O Controller Hub 10
(ICH10) Family
Datasheet
October 2008
http://www.DataSheet4U.net/
Document Number: 319973-003
datasheet pdf - http://www.DataSheet4U.net/

1 page




AF82801 pdf
5.16
5.17
5.18
5.19
5.20
5.21
5.22
5.23
5.15.1 Power Wells......................................................................................... 173
5.15.2 SMI# and SCI Routing .......................................................................... 173
5.15.3 Triggering ........................................................................................... 173
5.15.4 GPIO Registers Lockdown ...................................................................... 173
5.15.5 Serial POST Codes Over GPIO ................................................................ 174
5.15.6 Intel Management Engine GPIOs ............................................................ 176
SATA Host Controller (D31:F2, F5) .................................................................... 176
5.16.1 SATA Feature Support........................................................................... 177
5.16.2 Theory of Operation.............................................................................. 178
5.16.3 SATA Swap Bay Support ....................................................................... 178
5.16.4 Hot Plug Operation ............................................................................... 178
5.16.5 Function Level Reset Support (FLR) ........................................................ 179
5.16.6 Intel® Matrix Storage Technology Configuration ....................................... 180
5.16.7 Power Management Operation................................................................ 181
5.16.8 SATA Device Presence........................................................................... 183
5.16.9 SATA LED............................................................................................ 184
5.16.10AHCI Operation.................................................................................... 184
5.16.11Serial ATA Reference Clock Low Power Request (SATACLKREQ#) ................ 184
5.16.12SGPIO Signals ..................................................................................... 185
5.16.13External SATA...................................................................................... 189
High Precision Event Timers.............................................................................. 189
5.17.1 Timer Accuracy .................................................................................... 189
5.17.2 Interrupt Mapping ................................................................................ 190
5.17.3 Periodic vs. Non-Periodic Modes ............................................................. 190
5.17.4 Enabling the Timers.............................................................................. 191
5.17.5 Interrupt Levels ................................................................................... 191
5.17.6 Handling Interrupts .............................................................................. 192
5.17.7 Issues Related to 64-Bit Timers with 32-Bit Processors .............................. 192
USB UHCI Host Controllers (D29:F0, F1, F2, F3 and D26:F0, F1 and F2) ................. 192
5.18.1 Data Structures in Main Memory............................................................. 193
5.18.2 Data Transfers to/from Main Memory ...................................................... 193
5.18.3 Data Encoding and Bit Stuffing ............................................................... 193
5.18.4 Bus Protocol ........................................................................................ 193
5.18.5 Packet Formats .................................................................................... 194
5.18.6 USB Interrupts..................................................................................... 194
http://www.DataSheet4U.net/
5.18.7 USB Power Management ....................................................................... 197
5.18.8 USB Legacy Keyboard Operation ............................................................ 197
5.18.9 Function Level Reset Support (FLR) ........................................................ 200
USB EHCI Host Controllers (D29:F7 and D26:F7)................................................. 201
5.19.1 EHC Initialization.................................................................................. 201
5.19.2 Data Structures in Main Memory............................................................. 202
5.19.3 USB 2.0 Enhanced Host Controller DMA................................................... 202
5.19.4 Data Encoding and Bit Stuffing ............................................................... 202
5.19.5 Packet Formats .................................................................................... 203
5.19.6 USB 2.0 Interrupts and Error Conditions .................................................. 203
5.19.7 USB 2.0 Power Management .................................................................. 204
5.19.8 Interaction with UHCI Host Controllers .................................................... 205
5.19.9 USB 2.0 Legacy Keyboard Operation ....................................................... 208
5.19.10USB 2.0 Based Debug Port .................................................................... 209
5.19.11USB Pre-Fetch Based Pause ................................................................... 213
5.19.12Function Level Reset Support (FLR) ........................................................ 214
SMBus Controller (D31:F3) ............................................................................... 214
5.20.1 Host Controller..................................................................................... 215
5.20.2 Bus Arbitration..................................................................................... 219
5.20.3 Bus Timing .......................................................................................... 220
5.20.4 Interrupts / SMI#................................................................................. 221
5.20.5 SMBALERT# ........................................................................................ 222
5.20.6 SMBus CRC Generation and Checking...................................................... 222
5.20.7 SMBus Slave Interface .......................................................................... 222
Intel® High Definition Audio Overview ................................................................ 228
Intel® Active Management Technology (Intel® AMT) (Corporate Only).................... 228
5.22.1 Intel® AMT Features ............................................................................. 229
5.22.2 Intel® AMT Requirements ...................................................................... 229
Serial Peripheral Interface (SPI) ........................................................................ 229
5.23.1 SPI Supported Feature Overview ............................................................ 230
5.23.2 Flash Descriptor ................................................................................... 232
5.23.3 Flash Access ........................................................................................ 234
Datasheet
5
datasheet pdf - http://www.DataSheet4U.net/

5 Page





AF82801 arduino
13.5.5 ID—Identification Register (LPC I/F—D31:F0) .......................................... 436
13.5.6 VER—Version Register (LPC I/F—D31:F0) ................................................ 436
13.5.7 REDIR_TBL—Redirection Table (LPC I/F—D31:F0)..................................... 437
13.6 Real Time Clock Registers................................................................................. 439
13.6.1 I/O Register Address Map ...................................................................... 439
13.6.2 Indexed Registers ................................................................................ 440
13.7 Processor Interface Registers (LPC I/F—D31:F0) ................................................. 444
13.7.1 NMI_SC—NMI Status and Control Register
(LPC I/F—D31:F0) ................................................................................ 444
13.7.2 NMI_EN—NMI Enable (and Real Time Clock Index)
Register (LPC I/F—D31:F0).................................................................... 445
13.7.3 PORT92—Fast A20 and Init Register (LPC I/F—D31:F0) ............................. 445
13.7.4 COPROC_ERR—Coprocessor Error Register
(LPC I/F—D31:F0) ................................................................................ 446
13.7.5 RST_CNT—Reset Control Register (LPC I/F—D31:F0) ................................ 446
13.8 Power Management Registers (PM—D31:F0) ....................................................... 447
13.8.1 Power Management PCI Configuration Registers
(PM—D31:F0) ...................................................................................... 447
13.8.2 APM I/O Decode................................................................................... 460
13.8.3 Power Management I/O Registers ........................................................... 461
13.9 System Management TCO Registers (D31:F0) ..................................................... 483
13.9.1 TCO_RLD—TCO Timer Reload and Current Value Register .......................... 483
13.9.2 TCO_DAT_IN—TCO Data In Register ....................................................... 484
13.9.3 TCO_DAT_OUT—TCO Data Out Register .................................................. 484
13.9.4 TCO1_STS—TCO1 Status Register .......................................................... 484
13.9.5 TCO2_STS—TCO2 Status Register .......................................................... 486
13.9.6 TCO1_CNT—TCO1 Control Register ......................................................... 488
13.9.7 TCO2_CNT—TCO2 Control Register ......................................................... 489
13.9.8 TCO_MESSAGE1 and TCO_MESSAGE2 Registers ....................................... 489
13.9.9 TCO_WDCNT—TCO Watchdog Control Register ......................................... 490
13.9.10SW_IRQ_GEN—Software IRQ Generation Register .................................... 490
13.9.11TCO_TMR—TCO Timer Initial Value Register............................................. 490
13.10 General Purpose I/O Registers (D31:F0)............................................................. 491
13.10.1GPIO_USE_SEL—GPIO Use Select Register .............................................. 492
13.10.2GP_IO_SEL—GPIO Input/Output Select Register ....................................... 492
http://www.DataSheet4U.net/
13.10.3GP_LVL—GPIO Level for Input or Output Register ..................................... 493
13.10.4GPO_BLINK—GPO Blink Enable Register .................................................. 493
13.10.5GP_SER_BLINK—GP Serial Blink ............................................................. 494
13.10.6GP_SB_CMDSTS—GP Serial Blink Command Status................................... 495
13.10.7GP_SB_DATA—GP Serial Blink Data ........................................................ 495
13.10.8GPI_INV—GPIO Signal Invert Register..................................................... 496
13.10.9GPIO_USE_SEL2—GPIO Use Select 2 Register .......................................... 497
13.10.10GP_IO_SEL2—GPIO Input/Output Select 2 Register ................................. 498
13.10.11GP_LVL2—GPIO Level for Input or Output 2 Register ............................... 498
13.10.12GPIO_USE_SEL3—GPIO Use Select 3 Register (Corporate Only) ................ 499
13.10.13GP_IO_SEL3—GPIO Input/Output Select 3 Register (Corporate Only)......... 499
13.10.14GP_LVL3—GPIO Level for Input or Output 3 Register (Corporate Only)....... 500
13.10.15GP_RST_SEL — GPIO Reset Select ........................................................ 500
14 SATA Controller Registers (D31:F2)....................................................................... 501
14.1 PCI Configuration Registers (SATA–D31:F2)........................................................ 501
14.1.1 VID—Vendor Identification Register (SATA—D31:F2) ................................ 503
14.1.2 DID—Device Identification Register (SATA—D31:F2) ................................. 503
14.1.3 PCICMD—PCI Command Register (SATA–D31:F2)..................................... 503
14.1.4 PCISTS — PCI Status Register (SATA–D31:F2) ......................................... 504
14.1.5 RID—Revision Identification Register (SATA—D31:F2)............................... 505
14.1.6 PI—Programming Interface Register (SATA–D31:F2)................................. 505
14.1.7 SCC—Sub Class Code Register (SATA–D31:F2) ........................................ 506
14.1.8 BCC—Base Class Code Register (SATA–D31:F2) ....................................... 506
14.1.9 PMLT—Primary Master Latency Timer Register (SATA–D31:F2) ................... 507
14.1.10HTYPE—Header Type (SATA–D31:F2) ..................................................... 507
14.1.11PCMD_BAR—Primary Command Block Base Address
Register (SATA–D31:F2) ....................................................................... 507
14.1.12PCNL_BAR—Primary Control Block Base Address Register
(SATA–D31:F2).................................................................................... 508
14.1.13SCMD_BAR—Secondary Command Block Base Address
Register (IDE D31:F1) .......................................................................... 508
Datasheet
11
datasheet pdf - http://www.DataSheet4U.net/

11 Page







PáginasTotal 70 Páginas
PDF Descargar[ Datasheet AF82801.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
AF82801I/O Controller Hub 10Intel
Intel

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar