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PDF HX8347-G Data sheet ( Hoja de datos )
| Número de pieza | HX8347-G | |
| Descripción | TFT Mobile Single Chip Driver | |
| Fabricantes | Himax | |
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DATA SHEET
( DOC No. HX8347-G(T)-DS )
HX8347-G(T)
240RGB x 320 dot, 262K color,
with internal GRAM,
TFT Mobile Single Chip Driver
Version 01 February, 2010
1 page  
HX8347-G(T)
240RGB x 320 dot, 262K color, with internal
GRAM, TFT Mobile Single Chip Driver
List of Figures
February, 2010
Figure 4.1: Register read/write timing in parallel bus system interface (for I80 series MPU) ........... 30
Figure 4.2: GRAM read/write timing in parallel bus system interface (for I80 series MPU).............. 31
Figure 4.3: Example of I80- system 18-bit parallel bus interface...................................................... 34
Figure 4.4: Input data bus and GRAM data mapping in 18-bit bus system interface with 18-bit-data
Input (“IM3, IM2, IM1, IM”=”1010” or “1000”) ............................................................................. 34
Figure 4.5: Example of I80 system 16-bit parallel bus interface type I ............................................. 35
Figure 4.6: Example of I80 system 16-bit parallel bus interface type II ............................................ 35
Figure 4.7: Input data bus and GRAM data mapping in 16-bit bus system interface with 12-bit-data
input (R17H=03h and “IM3, IM2, IM1, IM0”=”0000”) ................................................................. 36
Figure 4.8: Input data bus and GRAM data mapping in 16-bit bus system interface with 16-bit-data
input (R17H=05h and “IM3, IM2, IM1, IM0”=”0000”) ................................................................. 36
Figure 4.9: Input data bus and GRAM data mapping in 16-bit bus system interface with 18 bit-data
input (R17H=06h and “IM3, IM2, IM1, IM0”=”0000”) ................................................................. 36
Figure 4.10: Input data bus and GRAM data mapping in 16-bit bus system interface with 18(16+2)
bit-data input (R17H=07h and “IM3, IM2, IM1, IM0”=”0000”) .................................................... 36
Figure 4.11: Input data bus and GRAM data mapping in 16-bit bus system interface with 12-bit-data
input (R17H=03h and “IM3, IM2, IM1, IM0”=”0010”) ................................................................. 37
Figure 4.12: Input data bus and GRAM data mapping in 16-bit bus system interface with 16-bit-data
input (R17H=05h and “IM3, IM2, IM1, IM0”=”0010”) ................................................................. 37
Figure 4.13: Input data bus and GRAM data mapping in 16-bit bus system interface with 18(12+6)
bit-data input (R17H=06h and “IM3, IM2, IM1, IM0”=”0010”) .................................................... 37
Figure 4.14: Input data bus and GRAM data mapping in 16-bit bus system interface with 18(16+2)
bit-data input (R17H=07h and “IM3, IM2, IM1, IM0”=”0010”) .................................................... 37
Figure 4.15: Example of I80 system 9-bit parallel bus interface type I ............................................. 38
Figure 4.16: Example of I80 system 9-bit parallel bus interface type II ............................................ 38
Figure 4.17: Input data bus and GRAM data mapping in 9-bit bus system interface with 18-bit-data
input (R17H=06h and “IM3, IM2, IM1, IM0”=”1001”) ................................................................. 39
Figure 4.18: Input data bus and GRAM data mapping in 9-bit bus system interface with 18-bit-data
input (R17H=06h and “IM3, IM2, IM1, IM0”=”1011”).................................................................. 39
Figure 4.19: Example of I80 system 8-bit parallel bus interface type I ............................................. 40
Figure 4.20: Example of I80 system 8-bit parallel bus interface type II ............................................ 40
Figure 4.21: Input data bus and GRAM data mapping in 8-bit bus system interface with 12-bit-data
input (R17H=03h and“IM3, IM2, IM1, IM0”=”0001”) .................................................................. 41
Figure 4.22: Input data bus and GRAM data mapping in 8-bit bus system interface with 16-bit-data
input (R17H=05h and “IM3, IM2, IM1, IM0”=”0001”) ................................................................. 41
Figure 4.23: Input data bus and GRAM data mapping in 8-bit bus system interface with 18-bit-data
input (R17H=06h and “IM3, IM2, IM1, IM0”=”0001) .................................................................. 41
Figure 4.24: Input data bus and GRAM data mapping in 8-bit bus system interface with 12-bit-data
input (R17H=03h and“IM3, IM2, IM1, IM0”=”0011”)................................................................... 42
Figure 4.25: Input data bus and GRAM data mapping in 8-bit bus system interface with 16-bit-data
input (R17H=05h and “IM3, IM2, IM1, IM0”=”0011”).................................................................. 42
Figure 4.26: Input data bus and GRAM data mapping in 8-bit bus system interface with 18-bit-data
input (R17H=06h and “IM3, IM2, IM1, IM0”=”0011”).................................................................. 42
Figure 4.27: Index register read/write timing in 3-wire serial bus system interface .......................... 46
Figure 4.28: Data write timing in 3-wire serial bus system interface................................................. 47
Figure 4.29: Index register write timing in 4-wire serial bus system interface .................................. 48
Figure 4.30: Data write timing in 4-wire serial bus system interface................................................. 48
Figure 4.31: DOTCLK cycle .............................................................................................................. 49
Figure 4.32: RGB interface circuit input timing diagram ................................................................... 50
Figure 4.33: RGB mode timing diagram............................................................................................ 51
Figure 4.34: RGB 18-bit/pixel on 6-bit data width ............................................................................. 54
Figure 4.35: RGB 16-bit/pixel on 16-bit data width ........................................................................... 55
Figure 4.36: RGB 18-bit/pixel on 18-bit data width ........................................................................... 56
Figure 5.1: Image data sending order from host............................................................................... 58
Himax Confidential
-P.5-
This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed
in whole or in part without prior written permission of Himax.
February, 2010
5 Page 
HX8347-G(T)
240RGB x 320 dot, 262K color, with internal
GRAM, TFT Mobile Single Chip Driver
List of Tables
February, 2010
Table 6.2: List table of command set page 1................................................................................... 122
Table 8.1: Absolute maximum ratings ............................................................................................. 173
Table 8.2: ESD protection level ....................................................................................................... 173
Table 8.3: Current consumption ...................................................................................................... 176
Himax Confidential
-P.11-
This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed
in whole or in part without prior written permission of Himax.
February, 2010
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HX8347-G.PDF ] | |
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