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ADP2442 fiches techniques PDF

Analog Devices - DC-to-DC Regulator

Numéro de référence ADP2442
Description DC-to-DC Regulator
Fabricant Analog Devices 
Logo Analog Devices 





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ADP2442 fiche technique
36 V,1 A, Synchronous, Step-Down, DC-to-DC
Regulator with External Clock Synchronization
Data Sheet
ADP2442
FEATURES
Wide input voltage range from 4.5 V to 36 V
Low minimum on time of 50 ns typical
Maximum load current of 1 A
High efficiency of up to 94%
Adjustable output down to 0.6 V
±1% output voltage accuracy
Adjustable switching frequency from 300 kHz to 1 MHz
External synchronization from 300 kHz to 1 MHz
Pulse skip mode or forced fixed frequency mode
Precision enable input pin (EN)
Open-drain power good
Internal soft start
Overcurrent-limit protection
Shutdown current of less than 15 µA
UVLO and thermal shutdown
12-lead, 3 mm × 3 mm LFCSP package
Supported by the ADIsimPower™ tool set
APPLICATIONS
Point of load applications
Distributed power systems
Industrial control supplies
Standard rail conversion to 24 V/12 V/5 V/3.3 V
GENERAL DESCRIPTION
The ADP2442 is a constant frequency, current mode control,
synchronous, step-down, dc-to-dc regulator that is capable of
driving loads of up to 1 A with excellent line and load regulation
characteristics. The ADP2442 operates with a wide input voltage
range from 4.5 V to 36 V, which makes it ideal for regulating power
from a wide variety of sources. In addition, the ADP2442 has
very low minimum on time (50 ns) and is, therefore, suitable for
applications requiring a very high step-down ratio.
The output voltage can be adjusted from 0.6 V to 0.9 × VIN.
High efficiency is obtained with integrated low resistance
N-channel MOSFETs for both high-side and low-side devices.
The switching frequency is adjustable from 300 kHz to 1 MHz with
an external resistor. The ADP2442 also has an accurate power-good
(PGOOD) open-drain output signal.
The ADP2442 offers the flexibility of external clock synchroni-
zation. The switching frequency can be synchronized to an external
clock, applied to the SYNC/MODE pin. The ADP2442 can also
be configured to operate in the forced fixed frequency mode for
low EMI or power saving mode to reduce the switching losses at
light load.
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
TYPICAL CIRCUIT CONFIGURATION
C2
VOUT
RTOP
RBOTTOM
RCOMP
CCOMP
C1
CBOOST
FB VIN
ADP2442
COMP
SW
PGND
EN
VIN
CIN
VOUT
COUT
RFREQ
Figure 1.
The ADP2442 uses hiccup mode to protect the IC from short
www.DataSheet.net/ circuits or from overcurrent conditions on the output. The internal
soft start limits inrush current during startup for a wide variety of
load capacitances. Other key features include input undervoltage
lockout (UVLO), thermal shutdown (TSD), and precision enable
(EN), which can also be used as a logic level shutdown input.
The ADP2442 is available in a 3 mm × 3 mm, 12-lead LFCSP
package and is rated for a junction temperature range from
−40°C to +125°C.
100
90 VOUT = 12V
80
70
VOUT = 5V
60
50
VOUT = 3.3V
40
30
20
10
VIN = 24V
PWM = 300kHz
0
0.01
0.1
LOAD (A)
1
Figure 2. Efficiency vs. Load Current, VIN = 24 V
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2012 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
Datasheet pdf - http://www.DataSheet4U.co.kr/

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