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PDF L6391 Data sheet ( Hoja de datos )

Número de pieza L6391
Descripción High-voltage high and low side driver
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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No Preview Available ! L6391 Hoja de datos, Descripción, Manual

L6391
High-voltage high and low side driver
Features
High voltage rail up to 600 V
dV/dt immunity ± 50 V/nsec in full temperature
range
Driver current capability:
– 290 mA source,
– 430 mA sink
Switching times 75/35 nsec rise/fall with 1 nF
load
3.3 V, 5 V TTL/CMOS inputs with hysteresis
Integrated bootstrap diode
Comparator for fault protections
Smart shut-down function
Adjustable dead-time
Interlocking function
Compact and simplified layout
Bill of material reduction
Effective fault protection
Flexible, easy and fast design
Applications
Motor driver for home appliances, factory
automation, industrial drives and fans.
HID ballasts, power supply units.
Description
The L6391 is a high-voltage device manufactured
with the BCD “OFF-LINE” technology. It is a single
chip half-bridge gate driver for N-channel power
MOSFET or IGBT.
The high side (floating) section is designed to
stand a voltage rail up to 600 V. The logic inputs
arewww.DataSheet.net/ CMOS/TTL compatible down to 3.3 V for easy
interfacing microcontroller/DSP.
An integrated comparator is available for
protections against overcurrent, overtemperature,
etc.
Table 1. Device summary
Order codes
L6391N
L6391D
L6391DTR
December 2010
Package
DIP-14
SO-14
SO-14
Doc ID 17892 Rev 1
Packaging
Tube
Tube
Tape and reel
1/21
www.st.com
21
Datasheet pdf - http://www.DataSheet4U.co.kr/

1 page




L6391 pdf
L6391
3
Truth table
Note:
Table 3.
Truth table
Input
SD LIN
LX
HH
HL
HL
HH
X: don't care
HIN
X
L
H
L
H
Truth table
Output
LVG HVG
LL
LL
LL
HL
LH
www.DataSheet.net/
Doc ID 17892 Rev 1
5/21
Datasheet pdf - http://www.DataSheet4U.co.kr/

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L6391 arduino
L6391
Electrical characteristics
Table 8. DC operation electrical characteristics (VCC = 15 V; TJ = + 25 °C) (continued)
Symbol Pin
Parameter
Test condition
Min Typ Max Unit
Logic inputs
Vil
Vih
Vil_S
IHINh
IHINl
ILINl
ILINh
ISDh
ISDl
Low logic level voltage
1, 2, 3
High logic level voltage
1, 3 Single input voltage
HIN logic “1” input bias
current
3
HIN logic “0” input bias
current
LIN logic “0” input bias
current
1
LIN logic “1” input bias
current
SD logic “1” input bias
current
2
SD logic “0” input bias
current
LIN and HIN connected
together and floating
HIN = 15 V
HIN = 0 V
LIN = 0 V
LIN = 15 V
SD = 15 V
SD = 0 V
0.8
2.25
0.8
110 175 260
1
3 6 20
1
10 40 100
1
1. VBO = Vboot - Vout
2. RDSON is tested in the following way:
RDSON = [(VCC - VCBOOT1) - (VCC - VCBOOT2)] / [I1(VCC,VCBOOT1) - I2(VCC,VCBOOT2)]
where I1 is pin 14 current when VCBOOT = VCBOOT1, I2 when VCBOOT = VCBOOT2.
V
V
V
μA
μA
μA
μA
μA
μA
Table 9.
Symbol
www.DataSheet.net/
Sense comparator (VCC = 15 V, TJ = +25 °C)
Pin Parameter
Test conditions
Min Typ Max Unit
Vio 8, 9 Input offset voltage
-15 15 mV
Iib 8, 9 Input bias current
VCP+ = 1 V, VCP- = 0.5 V
1 μA
Vol
2
Open drain low level output
voltage
Iod = - 3 mA VCP+=1V;
VCP-=0.5V;
0.5 V
td_comp
Comparator delay
Rpull=100 kΩ to 5 V on
SD/OD pin; VCP-=0.5V;
voltage step on CP+ = 0 ÷
3.3V,
90 130 ns
SR 2 Slew rate
CL = 180 pF; Rpu = 5 kΩ
60 V/μs
Doc ID 17892 Rev 1
11/21
Datasheet pdf - http://www.DataSheet4U.co.kr/

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