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NCP702 fiches techniques PDF

On Semiconductor - LDO Linear Voltage Regulator

Numéro de référence NCP702
Description LDO Linear Voltage Regulator
Fabricant On Semiconductor 
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NCP702 fiche technique
NCP702
200 mA, Ultra-Low Quiescent
Current, Ultra-Low Noise, LDO
Linear Voltage Regulator
Noise sensitive applications such as Phase Locked Loops,
Oscillators, Frequency Synthesizers, Low Noise Amplifiers and other
Precision Instrumentation require very clean power supplies. The
NCP702 is a 200 mA LDO that provides the engineer with a very
stable, accurate voltage with ultralow noise and very high Power
Supply Rejection Ratio (PSRR), making it suitable for RF
applications. The device doesn’t require an additional noise bypass
capacitor to achieve ultralow noise performance. In order to optimize
performance for battery operated portable applications, the NCP702
employs an Adaptive Ground Current feature for ultralow ground
current consumption during lightload conditions.
Features
Operating Input Voltage Range: 2.0 V to 5.5 V
Available in Fixed Voltage Options: 0.8 to 3.5 V
Contact Factory for Other Voltage Options
Output Voltage Trimming Step: 2.5 mV
UltraLow Quiescent Current of Typ. 10 mA
UltraLow Noise: 11 mVRMS from 100 Hz to 100 kHz
Very Low Dropout: 140 mV Typical at 200 mA
±2% Accuracy Over Full Load/Line/Temperature
High PSRR: 68 dB at 1 kHz
Thermal Shutdown and Current Limit Protections
Internal SoftStart to Limit the TurnOn Inrush Current
Stable with a 1 mF Ceramic Output Capacitor
Available in TSOP5 and XDFN 1.5 x 1.5 mm Package
Active Output Discharge for Fast Output TurnOff
These are PbFree Devices
www.DataSheet.co.kr
Typical Applicaitons
PDAs, Mobile Phones, GPS, Smartphones
Wireless Handsets, Wireless LAN, Bluetooth, Zigbee
Portable Medical Equipment
Other Battery Powered Applications
VIN
CIN 1 mF
NCP702
IN OUT
VOUT
EN
GND
COUT
1 mF
Figure 1. Typical Application Schematic
http://onsemi.com
5
1
TSOP5
SN SUFFIX
CASE 483
1
XDFN6
MX SUFFIX
CASE 711AE
MARKING DIAGRAMS
5
XXXAYW
G
1
1
XM
G
X, XXX = Specific Device Code
M = Date Code
A = Assembly Location
Y = Year
W = Work Week
G = PbFree Package
PIN CONNECTIONS
1
IN OUT
GND
EN N/C
5Pin TSOP5
(Top View)
OUT
N/C
GND
1
IN
N/C
EN
6Pin XDFN 1.5 x 1.5 mm
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 18 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
March, 2012 Rev. 1
1
Publication Order Number:
NCP702/D
Datasheet pdf - http://www.DataSheet4U.net/

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