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Número de pieza | TBB1008 | |
Descripción | Twin Built in Biasing Circuit MOS FET IC | |
Fabricantes | Renesas | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de TBB1008 (archivo pdf) en la parte inferior de esta página. Total 14 Páginas | ||
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Regarding the change of names mentioned in the document, such as Hitachi
Electric and Hitachi XX, to Renesas Technology Corp.
The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Hitachi, Hitachi, Ltd., Hitachi Semiconductors, and other Hitachi brand
names are mentioned in the document, these names have in fact all been changed to Renesas
Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and
corporate statement, no changes whatsoever have been made to the contents of the document, and
these changes do not constitute any alteration to the contents of the document itself.
Renesas Technology Home Page: http://www.renesas.com
www.DataSheet.co.kr
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
Datasheet pdf - http://www.DataSheet4U.net/
1 page Electrical Characteristics
TBB1008
The below specification are applicable for UHF unit (FET1)
(Ta = 25°C)
Item
Symbol Min
Drain to source breakdown
voltage
V(BR)DSS
6
Gate1 to source breakdown
voltage
V +6(BR)G1SS
Gate2 to source breakdown
voltage
V +6
(BR)G2SS
Gate1 to source cutoff current
Gate2 to source cutoff current
Gate1 to source cutoff voltage
Gate2 to source cutoff voltage
Drain current
IG1SS
IG2SS
VG1S(off)
VG2S(off)
ID(op)
—
—
0.5
0.5
13
Forward transfer admittance |y |
fs
21
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance Crss
Power gain
PG
1.4
1.0
—
16
Noise figure
NF —
Typ Max Unit Test Conditions
——V
ID = 200 µA, VG1S = VG2S = 0
——V
IG1 = +10 µA, VG2S = VDS = 0
——V
I
G2
=
+10
µA,
V
G1S
=
V
DS
=
0
— +100 nA
— +100 nA
0.7 1.0 V
0.7 1.0 V
17 21 mA
26 32 mS
1.8 2.2
1.4 1.8
0.02
0.04www.DataSheet.co.kr
21 —
pF
pF
pF
dB
1.7 2.5 dB
VG1S = +5 V, VG2S = VDS = 0
VG2S = +5 V, VG1S = VDS = 0
VDS = 5 V, VG2S = 4 V, ID = 100 µA
VDS = 5 V, VG1S = 5 V, ID = 100 µA
VDS = 5 V, VG1 = 5 V
VG2S = 4 V, RG = 100 kΩ
V = 5 V, V = 5 V, V = 4 V
DS G1 G2S
RG = 100 kΩ, f = 1 kHz
VDS = 5 V, VG1 = 5 V
V
G2S
=4
V,
R
G
=
100
kΩ
f = 1 MHz
V = V = 5 V, V = 4 V
DS G1
G2S
RG = 100 kΩ, f = 900 MHz
Zi = S11*, Zo = S22* (:PG)
Zi = S11opt (:NF)
Rev.0, Jun. 2002, page 3 of 12
Datasheet pdf - http://www.DataSheet4U.net/
5 Page Forward Transfer Admittance
vs. Gate1 Voltage (FET2)
50
VDS = 5 V
VG2S = 4 V
40
R G = 68 k Ω
30 100 kΩ
150 kΩ
20
10
0 1 23 45
Gate1 Voltage V G1 (V)
TBB1008
Drain Current vs.
Gate Resistance (FET2)
30
V DS = 5 V
25 V G1= 5 V
V G2S = 4 V
20
15
10
5
0
10 20
50 100 200 500 1000
Gate Resistance R G (kΩ)
Input Capacitance vs.
Gate2 to Source Voltage (FET2)
4
3
2
V DS = 5 V
1 V G1= 5 V
RG = 100 kΩ
f = 1 MHz
0
0 1234
Gate2 to Source Voltage V G2S (V)
www.DataSheet.co.kr
40
35
Power Gain vs.
Gate Resistance (FET2)
30
25
20
V DS = 5 V
15
V G1= 5 V
V G2S = 4 V
f = 200 MHz
10
10 20 50 100 200 500 1000
Gate Resistance R G (kΩ)
Rev.0, Jun. 2002, page 9 of 12
Datasheet pdf - http://www.DataSheet4U.net/
11 Page |
Páginas | Total 14 Páginas | |
PDF Descargar | [ Datasheet TBB1008.PDF ] |
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