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PDF ADA4898-2 Data sheet ( Hoja de datos )
| Número de pieza | ADA4898-2 | |
| Descripción | (ADA4898-1/-2) High Speed Op Amp | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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High Voltage, Low Noise, Low Distortion,
Unity-Gain Stable, High Speed Op Amp
ADA4898-1/ADA4898-2
FEATURES
Ultralow noise
0.9 nV/√Hz
2.4 pA/√Hz
1.2 nV/√Hz at 10 Hz
Ultralow distortion: −93 dBc at 500 kHz
Wide supply voltage range: ±5 V to ±16 V
High speed
−3 dB bandwidth: 65 MHz (G = +1)
Slew rate: 55 V/µs
Unity gain stable
Low input offset voltage: 160 µV maximum
Low input offset voltage drift: 1 μV/°C
Low input bias current: −0.1 µA
Low input bias current drift: 2 nA/°C
Supply current: 8 mA
Power-down feature for single 8-lead package
APPLICATIONS
Instrumentation
Active filters
DAC buffers
SAR ADC drivers
Optoelectronics
GENERAL DESCRIPTION
The ADA4898 is an ultralow noise and distortion, unity gain
stable, voltage feedback op amp that is ideal for use in 16-bit and
18-bit systems with power supplies from ±5 V to ±16 V. The
ADA4898 features a linear, low noise input stage and internal
compensation that achieves high slew rates and low noise.
With the wide supply voltage range, low offset voltage, and wide
bandwidth, the ADA4898 is extremely versatile, and it features a
cancellation circuit that reduces input bias current.
The ADA4898 is available in an 8-lead SOIC package that
features an exposed metal paddle to improve power dissipation and
heat transfer to the negative supply plane. This EPAD offers a
significant thermal relief over traditional plastic packages. The
ADA4898 is rated to work over the extended industrial
temperature range of −40°C to +105°C.
www.DataSheet.co.kr
CONNECTION DIAGRAM
ADA4898-1
TOP VIEW
(Not to Scale)
NC 1
–IN 2
+IN 3
–VS 4
8 PD
7 +VS
6 VOUT
5 NC
NC = NO CONNECT
Figure 1. Single 8-Lead ADA4898-1 SOIC_N_EP (RD-8-1)
ADA4898-2
TOP VIEW
(Not to Scale)
VOUT1 1
8 +VS
–IN1 2
7 VOUT2
+IN1 3
6 –IN2
–VS 4
5 +IN2
Figure 2. Dual 8-Lead ADA4898-2 SOIC_N_EP (RD-8-1)
10
CURRENT
1 VOLTAGE
10
1
0.1
1
0.1
10 100 1k 10k 100k
FREQUENCY (Hz)
Figure 3. Input Voltage Noise and Current Noise vs. Frequency
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008-2010 Analog Devices, Inc. All rights reserved.
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
ADA4898-1/ADA4898-2
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Power Dissipation
Differential Mode Input Voltage
Common-Mode Input Voltage
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
Junction Temperature
Rating
36 V
See Figure 4
±1.5 V
±11.4 V
−65°C to +150°C
−40°C to +105°C
300°C
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions; that is, θJA is
specified for a device soldered in the circuit board with its
exposed paddle soldered to a pad on the PCB surface that is
thermally connected to a copper plane, with zero airflow.
Table 4.
Package Type
Single 8-Lead SOIC_N_EP on a 4-Layer Board
Dual 8-Lead SOIC_N_EP on a 4-Layer Board
θJA θJC Unit
47 29 °C/W
42 29 °C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the ADA4898 package is
limited by the associated rise in junction temperature (TJ) on
the die. At approximately 150°C, which is the glass transition
temperature, the plastic changes its properties. Even temporarily
exceeding this temperature limit can change the stresses that the
package exerts on the die, permanently shifting the parametric
performance of the ADA4898. Exceeding a junction temperature
of 150°C for an extended period can result in changes in the
silicon devices, potentially causing failure.
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the output load drive. The quiescent power is
the voltage between the supply pins (VS) times the quiescent
current (IS). The power dissipated due to the load drive depends
upon the particular application. For each output, the power due
to load drive is calculated by multiplying the load current by the
associated voltage drop across the device. RMS voltages and
currents must be used in these calculations.
Airflow increases heat dissipation, effectively reducing θJA. In
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes
reduces the θJA. The exposed paddle on the underside of the
package must be soldered to a pad on the PCB surface that is
thermally connected to a copper plane to achieve the specified JA.θ
Figure 4 shows the maximum power dissipation vs. the ambient
temperature for the single and dual 8-lead SOIC_N_EP on a
JEDEC standard 4-layer board, with its underside paddle
soldered to a pad that is thermally connected to a PCB plane. θJA
values are approximations.
5.0
4.5
4.0
www.DataSheet.co.kr
3.5
3.0
ADA4898-2
2.5
ADA4898-1
2.0
1.5
1.0
0.5
0
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100
AMBIENT TEMPERATURE (°C)
Figure 4. Maximum Power Dissipation vs. Ambient Temperature
ESD CAUTION
Rev. C | Page 5 of 20
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
0
ΔVCM = 1V p-p
–20
–40
–60 ΔVCM = 100mV p-p
–80
–100
G = +1
–120
RF = 0Ω
RL = 100Ω
–140
VS = ±15V
100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
Figure 31. Common-Mode Rejection Ratio (CMRR) vs. Frequency
–45
VOUT = 0.1V p-p
–55
VOUT = 2V p-p
–65
G = +1
RL = 1kΩ
VS = ±15V
–75
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 32. PD Input to Output Isolation vs. Frequency
0
–20
–40
–60
–80
–100
–120
100
+PSRR
–PSRR
1k 10k
100k
G = +1
RF = 0Ω
RL = 100Ω
VS = ±15V
VOUT = 2V p-p
1M 10M
FREQUENCY (Hz)
Figure 33. Power Supply Rejection Ratio (PSRR) vs. Frequency
ADA4898-1/ADA4898-2
15
POSITIVE SWING,
VS = +15V
12
NEGATIVE SWING,
VS = –15V
9
5
NEGATIVE SWING,
VS = –5V
4
3
POSITIVE SWING, VS = +5V
62
31
0
50 100
1000
LOAD RESISTANCE (Ω)
0
4000
Figure 34 Output Swing vs. Load, G = +2, Load = RL // (RF + RG)
–40
G = +1
RL = 1kΩ
–50 VOUT = 2V p-p
+IN1 TO VOUT2, VS = ±5V
–60 +IN1 TO VOUT2, VS = ±15V
–70
www.DataSheet.co.kr
–80
–90
–100
+IN2 TO VOUT1, VS = ±15V
+IN2 TO VOUT1, VS = ±5V
–110
1
10
FREQUENCY (MHz)
Figure 35. Crosstalk vs. Frequency
100
Rev. C | Page 11 of 20
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
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| PDF Descargar | [ Datasheet ADA4898-2.PDF ] | |
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