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PDF AD7608 Data sheet ( Hoja de datos )
| Número de pieza | AD7608 | |
| Descripción | 8-Channel DAS | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
8-Channel DAS with 18-Bit, Bipolar,
Simultaneous Sampling ADC
AD7608
FEATURES
8 simultaneously sampled inputs
True bipolar analog input ranges: ±10 V, ±5 V
Single 5 V analog supply and 2.3 V to 5.25 V VDRIVE
Fully integrated data acquisition solution
Analog input clamp protection
Input buffer with 1 MΩ analog input impedance
Second-order antialiasing analog filter
On-chip accurate reference and reference buffer
18-bit ADC with 200 kSPS on all channels
Oversampling capability with digital filter
Flexible parallel/serial interface
SPI/QSPI™/MICROWIRE™/DSP compatible
Pin compatible solutions from 14-bits to 18-bits
Performance
7 kV ESD rating on analog input channels
98 dB SNR, −107 dB THD
Low power: 100 mW
Standby mode: 25 mW
64-lead LQFP package
APPLICATIONS
Power line monitoring and protection systems
Multiphase motor controls
Instrumentation and control systems
Multiaxis positioning systems
Data acquisition systems (DAS)
COMPANION PRODUCTS
External References: ADR421, ADR431
Digital Isolators: ADuM1402, ADuM5000, ADuM5402
Voltage Regulator Design Tool: ADIsimPower, Supervisor
Parametric Search
Complete list of complements on AD7608 product page
Table 1. High Resolution, Bipolar Input, Simultaneous
Sampling DAS Solutions
Single-
Ended
Resolution Inputs
True Number of
Differential Simultaneous
Inputs
Sampling Channels
18 Bits
AD76081 AD7609
8
16 Bits
AD7606
8
AD7606-6
6
AD7606-4
4
www.DataSheet.co.kr
14 Bits
AD7607
8
1 Patent pending.
V1
V1GND
V2
V2GND
V3
V3GND
V4
V4GND
V5
V5GND
V6
V6GND
V7
V7GND
V8
V8GND
CLAMP 1MΩ
CLAMP
1MΩ
CLAMP 1MΩ
CLAMP
1MΩ
CLAMP 1MΩ
CLAMP
1MΩ
CLAMP 1MΩ
CLAMP
1MΩ
CLAMP 1MΩ
CLAMP
1MΩ
CLAMP 1MΩ
CLAMP
1MΩ
CLAMP 1MΩ
CLAMP
1MΩ
CLAMP 1MΩ
CLAMP
1MΩ
FUNCTIONAL BLOCK DIAGRAM
AVCC
AVCC
REGCAP REGCAP REFCAPB REFCAPA
RFB
RFB
SECOND
ORDER LPF
T/H
RFB
RFB
SECOND
ORDER LPF
T/H
RFB
RFB
SECOND
ORDER LPF
T/H
2.5V
LDO
2.5V
LDO
2.5V
REF
RFB
RFB
SECOND
ORDER LPF
T/H
RFB
RFB
SECOND
ORDER LPF
T/H
8:1
MUX
18-BIT
SAR
DIGITAL
FILTER
SERIAL
PARALLEL/
SERIAL
INTERFACE
RFB
RFB
SECOND
ORDER LPF
T/H
RFB
RFB
SECOND
ORDER LPF
T/H
AD7608
CLK OSC
PARALLEL
RFB
RFB
SECOND
ORDER LPF
T/H
CONTROL
INPUTS
AGND
CONVST A CONVST B RESET RANGE
Figure 1.
REFIN/REFOUT
REF SELECT
AGND
OS 2
OS 1
OS 0
DOUTA
DOUTB
RD/SCLK
CS
PAR/SER SEL
VDRIVE
DB[15:0]
BUSY
FRSTDATA
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2011-2012 Analog Devices, Inc. All rights reserved.
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
Data Sheet
AD7608
Parameter
ANALOG INPUT
Input Voltage Ranges
Analog Input Current
Input Capacitance 7
Input Impedance
REFERENCE INPUT/OUTPUT
Reference Input Voltage Range
DC Leakage Current
Input Capacitance7
Reference Output Voltage
Reference Temperature Coefficient
LOGIC INPUTS
Input High Voltage (VINH)
Input Low Voltage (VINL)
Input Current (IIN)
Input Capacitance (CIN)7
LOGIC OUTPUTS
Output High Voltage (VOH)
Output Low Voltage (VOL)
Floating-State Leakage Current
Floating-State Output Capacitance7
Output Coding
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time
Throughput Rate
POWER REQUIREMENTS
AVCC
VDRIVE
ITOTAL
Normal Mode (Static)
Normal Mode (Operational)8
Standby Mode
Shutdown Mode
Power Dissipation
Normal Mode (Static)
Normal Mode (Operational) 8
Standby Mode
Shutdown Mode
Test Conditions/Comments
RANGE = 1
RANGE = 0
10 V; see Figure 28
5 V; see Figure 28
REF SELECT = 1
REFIN/REFOUT
ISOURCE = 100 µA
ISINK = 100 µA
Twos complement
All eight channels included;www.DataSheet.co.kr see Table 3
Per channel, all eight channels included
Digital inputs = 0 V or VDRIVE
fSAMPLE = 200 kSPS
fSAMPLE = 200 kSPS
Min Typ Max
Unit
±10
±5
5.4
2.5
5
1
V
V
µA
µA
pF
MΩ
2.475
2.5
7.5
2.49/
2.505
±10
2.525
±1
V
µA
pF
V
ppm/°C
0.9 × VDRIVE
5
0.1 × VDRIVE
±2
V
V
µA
pF
VDRIVE − 0.2
±1
5
0.2
±20
V
V
µA
pF
4
1
200
µs
µs
kSPS
4.75 5.25 V
2.3 5.25 V
16 22
20 27
58
2 11
mA
mA
mA
µA
80 115.5
100 142
25 42
10 58
mW
mW
mW
µW
1 Temperature range for B version is −40°C to +85°C.
2 See the Terminology section.
3 This specification applies when reading during a conversion or after a conversion. If reading during a conversion in parallel mode with VDRIVE = 5 V, SNR typically reduces by 1.5 dB
and THD by 3 dB.
4 LSB means least significant bit. With ±5 V input range, 1 LSB = 38.14 µV. With ±10 V input range, 1 LSB = 76.29 µV.
5 These specifications include the full temperature range variation and contribution from the internal reference buffer but do not include the error contribution from
the external reference.
6 Bipolar zero code error is calculated with respect to the analog input voltage.
7 Sample tested during initial release to ensure compliance.
8 Operational power/current figure includes contribution when running in oversampling mode.
Rev. A | Page 5 of 32
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD7608
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
ANALOG INPUT
DECOUPLING CAPACITOR PIN
POWER SUPPLY
AVCC 1
AGND 2
OS 0 3
OS 1 4
GROUND PIN
OS 2 5
DATA OUTPUT
PAR/SER SEL 6
DIGITAL OUTPUT
DIGITAL INPUT
REFERENCE INPUT/OUTPUT
STBY 7
RANGE 8
CONVST A 9
CONVST B 10
RESET 11
RD/SCLK 12
CS 13
BUSY 14
FRSTDATA 15
DB0 16
PIN 1
AD7608
TOP VIEW
(Not to Scale)
48 AVCC
47 AGND
46 REFGND
45 REFCAPB
44 REFCAPA
43 REFGND
42 REFIN/REFOUT
41 AGND
40 AGND
39 REGCAP
38 AVCC
37 AVCC
36 REGCAP
35 AGND
34 REF SELECT
33 DB15
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Figure 7. Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
Type 1 Mnemonic
12F1F
1, 37, 38, 48 P
AVCC
2, 26, 35,
40, 41, 47
P
AGND
5, 4, 3
DI OS [2: 0]
6 DI PARE/SER SEL
AA
7 DI STBYE
A
8 DI RANGE
9, 10
DI CONVST A,
CONVST B
Description
Analog Supply Voltage 4.75 V to 5.25 V. This supply voltage is applied to the internal front-end
amplifiers and to the ADC core. Thesewww.DataSheet.co.kr supply pins should be decoupled to AGND.
Analog Ground. This pin is the ground reference point for all analog circuitry on the AD7608. All
analog input signals and external reference signals should be referred to these pins. All six of these
AGND pins should connect to the AGND plane of a system.
Oversampling Mode Pins. Logic inputs. These inputs are used to select the oversampling ratio. OS 2
is the MSB control bit, while OS 0 is the LSB control bit. See the Digital Filter section for further
details on the oversampling mode of operation and Table 8 for oversampling bit decoding.
Parallel/Serial Interface Selection Input. Logic input. If this pin is tied to a logic low, the parallel
interface is selected. If this pin is tied to a logic high, the serial interface is selected. In serial mode,
the
RDE/SCLK
AA
pin
functions
as
the
serial
clock
input.
The
DB7/DOUTA
and
DB8/DOUTB
pins
function
as
serial data outputs. When the serial interface is selected, DB[15:9] and DB[6:0] pins should be tied to
GND.
Standby Mode Input. This pin is used to place the AD7608 into one of two power-down modes: standby
mode or shutdown mode. The power-down mode entered depends on the state of the RANGE pin
as shown in Table 7. When in standby mode, all circuitry, except the on-chip reference regulators,
and regulator buffers, is powered down. When in shutdown mode, all circuitry is powered down.
Analog Input Range Selection. Logic input. The polarity on this pin determines the input range of
the analog input channels. If this pin is tied to a logic high, the analog input range is ±10 V for all
channels. If this pin is tied to a logic low, the analog input range is ±5 V for all channels. A logic
change on this pin has an immediate effect on the analog input range. Changing this pin during
a conversion is not recommended. See the Analog Input section for more details.
Conversion Start Input A, Conversion Start Input B. Logic inputs. These logic inputs are used to
initiate conversions on the analog input channels. For simultaneous sampling of all input channels,
CONVST A and CONVST B can be shorted together and a single convert start signal applied.
Alternatively, CONVST A can be used to initiate simultaneous sampling for V1, V2, V3, and V4, and
CONVST B can be used to initiate simultaneous sampling on the other analog inputs (V5, V6, V7, and
V8). This is only possible when oversampling is not switched on.
When the CONVST A or CONVST B pin transitions from low to high, the front-end track-and-hold
circuitry for their respective analog inputs is set to hold. This function allows a phase delay to be
created inherently between the sets of analog inputs.
Rev. A | Page 11 of 32
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD7608.PDF ] | |
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