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PDF NAU8812 Data sheet ( Hoja de datos )

Número de pieza NAU8812
Descripción Mono Audio Codec
Fabricantes Nuvoton Technology 
Logotipo Nuvoton Technology Logotipo



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NAU8812
1. GENERAL DESCRIPTION
Mono Audio Codec with Speaker Driver
emPowerAudio
The NAU8812 is a cost effective and low power wideband MONO audio CODEC. It is designed for voice
telephony related applications. Functions include Automatic Level Control (ALC) with noise gate, PGA, standard
audio interface I2S, PCM with time slot assignment, and on-chip PLL. The device provides one differential
microphone input and one single ended auxiliary input (multi purpose). There are few variable gain control stages
in the audio path. It also includes MONO line output and integrated BTL speaker driver.
The analog inputs have PGA on the front end, allowing dynamic range optimization with a wide range of input
sources. The microphone amplifiers have a programmable gain from -12dB to +35.25dB to handle both amplified
microphones. In addition to a digital high pass filter to remove DC offset voltages, the ADC also features voice
band digital filtering. Voice-band data is accepted by the audio interface (I2S). The DAC converter path includes
filtering and mixing, programmable-gain amplifiers (PGA), and soft muting. The digital interfaces, 2-Wire or SPI,
have independent supply voltage to allow integration into multiple supply systems. The NAU8812 operates at
supply voltages from 2.5V to 3.6V, although the digital core can operate at voltage as low as 1.71V to save power.
The NAU8812 is specified for operation from -40°C to +85°C. AEC-Q100 & TS16949 compliant device is
available upon request.
2. FEATURES
24-bit signal processing linear Audio CODEC
Audio DAC: 93dB SNR and -84dB THD
Audio ADC: 91dB SNR and -79dB THD
Support variable sample rates from 8 - 48kHz
Integrated BTL Speaker Driver 800mW (8Ω / 5V)
Integrated Headset Driver 40mW (16Ω / 3.3V)
Analog I/O
Integrated programmable Microphone Amplifier
Integrated Line Input and Line Output
Earphone / Speaker / Line Output selection
Microphone / Line Inputs selection
Low Noise bias supplied for microphone
On-chip PLL
Interfaces
I2S digital interface PCM time slot assignment
SPI & 2-Wire serial control Interface (I2C style; Read/Write capable)
Low Power, Low Voltage
Analog Supply: 2.5V to 3.6V
Digital Supply: 1.71V to 3.6V
Nominal Operating Voltage: 3.3V
Additional features
Programmable ALC
ADC Notch Filter
Programmable High Pass Filter
Digital A/D-D/A Passthrough
AEC-Q100 & TS16949 compliant device available upon request
Industrial temperature: range: 40C to +85C
Applications
VoIP Telephones]
Conference speaker-phone
emPowerAudio
Datasheet Revision 2.8
Page 1 of 110
June 2016

1 page




NAU8812 pdf
4. BLOCK DIAGRAM
NAU8812
VSSSPK
VSSSPK
VDDSPK
VDDSPK
VSSA
VSSA
VSSD
VDDA
VDDB
VDDC
NC
DACIN
BCLK
FS
ADCOUT
SO
SCLK
SDIO
MODE
CSb/GPIO
MCLK
emPowerAudio
Datasheet Revision 2.8
Figure 3: NAU8812 General Block Diagram
Page 5 of 110
June 2016

5 Page





NAU8812 arduino
NAU8812
Figure 38: PCM Mode Audio Interface (Special mode) ...............................................................................................56
Figure 39: PCM Time Slot Mode (Time slot = 0) (Normal Mode) ................................................................................57
Figure 40: PCM Time Slot Mode (Time slot = 0) (Special mode) ................................................................................57
Figure 41: The Programmable ADCOUT Pin ..............................................................................................................85
Figure 42: SPI Write Timing Diagram..........................................................................................................................92
Figure 43: SPI Read Timing Diagram .........................................................................................................................92
Figure 44: 2-Wire Timing Diagram ..............................................................................................................................94
Figure 45: Audio Interface Slave Mode Timing Diagram .............................................................................................95
Figure 46: Audio Interface in Master Mode Timing Diagram .......................................................................................95
Figure 47: PCM Audio Interface Slave Mode Timing Diagram ....................................................................................96
Figure 48: PCM Audio Interface Slave Mode Timing Diagram ....................................................................................96
Figure 49: PCM Audio Interface Slave Mode (PCM Time Slot Mode )Timing Diagram..............................................97
Figure 50: PCM Audio Interface Master Mode (PCM Time Slot Mode )Timing Diagram.............................................97
Figure 51: MCLK Timing Diagram...............................................................................................................................98
Figure 52: DAC Filter Frequency Response..............................................................................................................103
Figure 53: ADC Filter Frequency Response..............................................................................................................103
Figure 54: DAC Filter Ripple .....................................................................................................................................103
Figure 55: ADC Filter Ripple .....................................................................................................................................103
Figure 56: Application Diagram 28-Pin SSOP...........................................................................................................104
Figure 57: Application Diagram for 32-Pin QFN ........................................................................................................105
emPowerAudio
Datasheet Revision 2.8
Page 11 of 110
June 2016

11 Page







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