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PDF AFBR-79EIZ Data sheet ( Hoja de datos )

Número de pieza AFBR-79EIZ
Descripción Parallel Fiber-Optics Module
Fabricantes Avago 
Logotipo Avago Logotipo



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AFBR-79EIZ, AFBR-79EIDZ
40G-iSR4 QSFP+ Pluggable, Parallel Fiber-Optics Module
for 40Gigabit and 10Gigabit Ethernet Applications
Data Sheet - Preliminary
AFBR-79EIZ
Description
Features
The Avago Technologies AFBR-79EI(D)Z is a Four-Channel, x Compliant to the 40GbE Specification IEEE 802.3ba
Pluggable, Parallel, Fiber-Optic QSFP+ Transceiver for 40
D3.2 (40GBASE-SR4)
Gigabit Ethernet (40GbE) applications with added capa- x Support interoperability with IEEE 802.3ae 10GBASE-
bility of inter-operating with IEEE 10GBASE-SR compliant
products. This transceiver is a high performance module
for short-range multi-lane data communication and in-
terconnect applications. It integrates four data lanes
ATAin each direction with each lane operating at 10.3125
Gbps, giving an aggregated bandwidth of 40 Gbps. This
transceiver can also be used for high density 10 Gigabit
Ethernet application to allow effective port count of over
D100 within 1 RU rack. It allows optical interoperability with
any 10 Gigabit Ethernet (10GbE) transceiver, compliant
Yto the IEEE 802.3ae 10GBASE-SR specifications, of form
Rfactors such as SFP+, XFP and X2. This transceiver is desig-
Anated as a 40G-iSR4 solution, where the letter i represents
interoperability between this QSFP+ transceiver with any
IN10GBASE-SR compliant modules.
This QSFP+ transceiver link length for either 40 Gigabit
ELIMEthernet or high density 10 Gigabit Ethernet application
is up to 100 m using OM3 fiber or 150 m using OM4 fiber.
These modules are designed to operate over multimode
fiber systems using a nominal wavelength of 850nm. The
electrical interface uses a 38 contact edge type connector.
PRThe optical interface uses an 8 or 12 fiber MTP£ (MPO)
SR modules of various form factors such as SFP+, XFP,
and X2
x Compliant to the industry standard SFF-8436 QSFP+
Specification Revision 3.5
x Power Level 1: Max Power <1.5W
x High port density: 21mm horizontal port pitch
x Operates at 10.3125 Gbps per channel with 64b/66b
coded data
x Links up to 100m using OM3 fiber and 150m using
OM4 fiber
x 0 to 70°C case temperature operating range
x Proven High Reliability 850 nm technology: Avago
VCSEL array transmitter and Avago PIN array receiver
x Hot pluggable transceiver for servicing and ease of
installation
x Two Wire Serial (TWS) interface with maskable
interrupts for expanded functionality
x Utilizes a standard 12/8 lane optical fiber with MTP£
(MPO) optical connector for high density and thin,
connector. This module incorporates Avago Technolo-
light-weight cable management
gies proven integrated circuit and VCSEL technology to
provide reliable long life, high performance, and consis- Applications
tent service.
x 40GbE and high density 10GbE interconnects
Part Number Ordering Options
x Datacom/Telecom switch & router connections
AFBR-79EIDZ
AFBR-79EIZ
40G-iSR4 module with full real-time
digital diagnostic monitoring
40G-iSR4 module
x Data aggregation and backplane applications
x Proprietary protocol and density applications
AFBR-79Q4EKZ* Evaluation Board
AFBR-79Q2EKZ** Evaluation Kit
* Includes GUI and User Guide
** Includes GUI, User Guide, i-Port and Power Supply
This preliminary data is provided to assist you in the evaluation of product(s) currently under development. Until
Avago Technologies releases this product for general sales, Avago Technologies reserves the right to alter prices,
specifications, features, capabilities, functions, release dates, and remove availability of the product(s) at anytime.
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AFBR-79EIZ pdf
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Recommended Operating Conditions
Recommended Operating Conditions specify parameters for which the optical and electrical characteristics hold
unless otherwise noted. Optical and electrical characteristics are not defined for operation outside the Recommended
Operating Conditions, reliability is not implied and damage to the module may occur for such operation over an
extended period of time.
Parameter
Symbol Min Typ Max Units Reference
Case Temperature
Tc 0
40 70 °C 1
3.3 V Power Supply Voltage
Vcc
3.135
3.3
3.465
V
Signal Rate per Channel
10.3125
GBd 2
Control* Input Voltage High
Vih 2
Vcc+.3 V
Control* Input Voltage Low
Vil -0.3
0.8 V
Two Wire Serial (TWS) Interface Clock Rate
400 kHz
Power Supply Noise
50
mVpp
3
Receiver Differential Data Output Load
100 Ohms
Fiber Length: 2000 MHz∙km 50μm MMF (OM3)
0.5
100 m
Fiber Length: 4700 MHz∙km 50μm MMF (OM4)
0.5
150 m
ATA* Control signals, LVTTL (3.3 V) compatible
Notes:
1. The position of case temperature measurement is shown in Figure 8.
2. 64b/66b coding is assumed
D3. Power Supply Noise is defined as the peak-to-peak noise amplitude over the frequency range at the host supply side of the recommended power
supply filter with the module and recommended filter in place. Voltage levels including peak-to-peak noise are limited to the recommended
Yoperating range of the associated power supply. See Figure 9 for recommended power supply filter.
ARTransceiver Electrical Characteristics*
INThe following characteristics are defined over the Recommended Operating Conditions unless otherwise noted. Typical
values are for Tc = 40°C, Vcc = 3.3 V
ELIMParameter
Symbols Min Typ Max Units
Transceiver Power Consumption
1.5 W
Transceiver Power Supply Current
475 mA
Transceiver Power On Initialization Time
tpwr init
2000
ms
PR* For control signal timing including ModSelL, LPMode, ResetL, ModPrsL, IntL, SCL and SDA see Control Interface Section.
Reference
1
Note:
1. Power On Initialization Time is the time from when the supply voltages reach and remain above the minimum Recommended Operating Conditions
to the time when the module enables TWS access. The module at that point is fully functional.
5
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AFBR-79EIZ arduino
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QSFP+ Transceiver Pad Layout
38 GND
37 TX1n
36 TX1p
35 GND
34 TX3n
33 TX3p
32 GND
31 LPMode
30 Vcc1
29 VccTx
28 IntL
27 ModPrsL
26 GND
25 RX4p
24 RX4n
23 GND
22 RX2p
21 RX2n
20 GND
GND
TX2n
TX2p
GND
TX4n
TX4p
GND
ModSelL
ResetL
VccRx
SCL
SDA
GND
RX3p
RX3n
GND
RX1p
RX1n
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Top Side
Bottom Side
Viewed from Top
Figure 7. QSFP+ Transceiver Pad Layout
Viewed from Bottom
ATAPin Logic
1
2 CML-I
3 CML-I
D4
5 CML-I
6 CML-I
Y7
R8 LVTTL-I
9 LVTTL-I
A10
11 LVCMOS-I/O
IN12 LVCMOS-I/O
13
14 CML-O
ELIM15 CML-O
16
17 CML-O
18 CML-O
19
20
PR21 CML-O
Symbol
GND
Tx2n
Tx2p
GND
Tx4n
Tx4p
GND
ModSelL
ResetL
Vcc Rx
SCL
SDA
GND
Rx3p
Rx3n
GND
Rx1p
Rx1n
GND
GND
Rx2n
Description
Ground
Transmitter Inverted Data Input
Transmitter Non-Inverted Data Input
Ground
Transmitter Inverted Data Input
Transmitter Non-Inverted Data Input
Ground
Module Select
Module Reset
+3.3V Power supply receiver
2-wire serial interface clock
2-wire serial interface data
Ground
Receiver Non-Inverted Data Output
Receiver Inverted Data Output
Ground
Receiver Non-Inverted Data Output
Receiver Inverted Data Output
Ground
Ground
Receiver Inverted Data Output
Plug Sequence
1
3
3
1
3
3
1
3
3
2
3
3
1
3
3
1
3
3
1
1
3
Notes
1
1
1
2
1
1
1
1
22 CML-O
Rx2p
Receiver Non-Inverted Data Output
3
23 GND Ground
11
24 CML-O
Rx4n
Receiver Inverted Data Output
3
25 CML-O
Rx4p
Receiver Non-Inverted Data Output
3
26 GND Ground
11
27 LVTTL-O
ModPrsL Module Present
3
28 LVTTL-O
IntL
Interrupt
3
29
Vcc Tx
+3.3V Power supply transmitter
2
2
30 Vcc1 +3.3V Power Supply
22
31 LVTTL-I
LPMode Low Power Mode
3
32 GND Ground
11
33 CML-I
Tx3p
Transmitter Non-Inverted Data Input
3
34 CML-I
Tx3n
Transmitter Inverted Data Input
3
35 GND Ground
11
36 CML-I
Tx1p
Transmitter Non-Inverted Data Input
3
37 CML-I
Tx1n
Transmitter Inverted Data Input
3
38 GND Ground
11
Notes:
1. GND is the symbol for signal supply (power) common for the QSFP+ module. All are common within the
QSFP+ module and all module voltages are referenced to this potential unless otherwise noted. Connect
these directly to the host board signal-common ground plane
2. Vcc Rx, Vcc1 and Vcc Tx are the receiver and transmitter power supplies and shall be applied concurrently.
11
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