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PDF LV8104V Data sheet ( Hoja de datos )
| Número de pieza | LV8104V | |
| Descripción | Three-Phase Brushless Motor Predriver | |
| Fabricantes | Sanyo Semicon Device | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LV8104V (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
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www.DataSheet.co.kr
Ordering number : ENA1677
LV8104V
Bi-CMOS IC
For Variable Speed Control
Three-Phase Brushless Motor Predriver
Overview
The LV8104V is a pre-driver IC designed for variable speed control of 3-phase brushless motors. It can be used to
implement both upper and low output N-channel power FET drive circuit using a built-in charge pump circuit.
High-efficiency drive is possible through the use of direct PWM drive and synchronous rectifyication.
Functions
• VCC max = VG max = 42V
• Three-phase bipolar direct PWM drive
• Built-in charge pump for the upper side gate drive voltage generation
• Speed discriminator and PLL speed control system
• High efficiency drive by synchronous rectification
• 5V regulator output
• Start/Stop switching circuit(power save state in a stop mode)
• Forward/reverse switching circuit
• Braking circuit (short braking)
• Built-in FG amplifier and integrating amplifier
• Built-in VCO circuit
• Speed lock detection output
• Current limiter
• Constaint protection circuit
• Clock disconnection protection circuit
• Thermal shutdown protection circuit
• Low-voltage protection circuit
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer's products or
equipment.
31710 SY 20100219-S00001 No.A1677-1/19
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
www.DataSheet.co.kr
Package Dimensions
unit : mm (typ)
3277
15.0
44
23
LV8104V
1
(0.68)
0.65
22
0.22
0.2
SANYO : SSOP44(275mil)
Pd max - Ta
2.0 Specified board : 114.3 × 76.1 × 1.6mm3
1.7 Mounted on a board
glass epoxy
1.5
1.0
Independent IC
0.65
0.5
0.95
0.36
0
—20 0
20 40 60 80 100
Ambient temperature, Ta - C
Pin Assignment
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
LV8104
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
No.A1677-5/19
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
www.DataSheet.co.kr
LV8104V
Continued from preceding page.
Pin No. Pin name
Pin function
7
CSD
Pin to set the operating time of the constraint
protection.
Connect a capacitor between this pin and GND.
This pin combines also functions as the logic circuit
block initial reset pin.
VREG
Equivalent circuit
Reset circuit
7
8 INTOUT Integrating amplifier output pin.
VREG
9
INTIN
Integrating amplifier inverting input pin.
10 INTREF Integrating amplifier non-inverting input pin.
1/2 VREG potential.
Connect a capacitor between this pin and GND.
VREG
10
11 DOUT Speed discriminator output pin.
Acceleration → high, deceleration → low.
VREG
8
INTOUT
9
11
12 POUT Speed control PLL output pin.
Outputs the phase comparison result for CLK and
FG.
VREG
12
Continued on next page.
No.A1677-11/19
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet LV8104V.PDF ] | |
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