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PDF LV5256GP Data sheet ( Hoja de datos )

Número de pieza LV5256GP
Descripción Step-Up/Down Converter
Fabricantes Sanyo Semicon Device 
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No Preview Available ! LV5256GP Hoja de datos, Descripción, Manual

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Ordering number : ENA1277
LV5256GP
Bi-CMOS LSI
Operating Mode Switching Type
Step-Up/Down Converter
Overview
The LV5256GP is an operating mode switching type step-up/step-down converter that can switch the operating mode by
using the external signal.
Functions
Built-in Pch gate drive power supply
Output short-circuit detection by monitoring the input side of the error amplifier
OCP timer function
Software start function
Support for tracking function
Built-in thermal protection circuit
Built-in UVLO
ON/OFF function: Off-time input current smaller than 1µA
Oscillation frequency : 300kHz to 1.5MHz Oscillation frequency can be set by an external resistor
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Maximum input voltage
Maximum output voltage
Maximum output current
Allowable input pin voltage
Allowable power dissipation
Symbol
VIN max
VDD max
VO max
IO max
VCONT max
Pd max
Conditions
Between OUT and SW
RT, FB, IN, OCP, SS, ONOFF, TRAC_IN,
DU_SEL, OPC_SEL pins
Mounted on a specified board *
Operating temperature
Topr
Storage temperature
Tstg
* Specified board : 50mm × 40mm × 0.8mm, glass epoxy 4-layer circuit board (2S2P).
Ratings
12
3.6
16
650
VDD
0.8
-20 to +85
-40 to +125
Unit
V
V
V
mA
V
W
°C
°C
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer's products or
equipment.
21209 MS PC 20080722-S00003 No.A1277-1/9
Datasheet pdf - http://www.DataSheet4U.net/

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LV5256GP pdf
www.DataSheet.co.kr
LV5256GP
Block Diagrams and Sample Application Circuit 1 (Step-down)
FB
V1
or IN
V2
0.01µF at 1.25ms
OCP
0.1µF
REG_O
disable
100kat 1MHz
RT
BIAS
disable
VREF
TSD
ot
Vref
VREG UVLO
OSC
3.3V
2.8V/2.5V
uvlo
Vref1R2
1.0V
(1.2V)
0.5V
(1.0V±1%)
disable
ot
uvlo
tout
+ pwm Control
+
+
+ Logic
+ du_sel
disable
uvlo
R
S
Q
tout
L/S
Vout-5
VREG
LDO with OPC
Vout-5
GND/ DU_SEL
OPEN
OPC_SEL
GND/OPEN: ×0.8
REG_O: ×0.4
L/S
×0.8
+
+
+ ×0.4
+
Vref
+ du_sel
VrefR2
disable disable
uvlo
Vref1R2
TRAC_IN
SS ONOFF
0.033µF at 3.3ms
vdd
pin heap 17 pin
VIN VIN=4.5 to 10V
1µF
VOUT
VOUT-5
0.022µF
V1 (Normal operation)
=1.0V to VIN
V2 (Tracking operaton)
=0V to VIN
22µH
SW
4.7µF
SBD
PGND
LGND
VDD
VDD=2.9 to 3.1V
0.1µF
Sample Application Circuit 2 (Step-up)
0.1µF
REG_O
disable
100kat 1MHz
RT
VOUT1
or
VOUT2
FB
IN
0.01µF at 1.25ms
OCP
BIAS
disable
VREF
TSD
ot
Vref
VREG UVLO
OSC
3.3V
2.8V/2.5V
uvlo
Vref1R2
1.0V
(1.2V)
0.5V
(1.0V±1%)
disable
ot
uvlo
tout
+ pwm Control
+
+
+ Logic
+ du_sel
disable
uvlo
R
S
Q
tout
L/S
Vout-5
VREG
LDO with OPC
Vout-5
DU_SEL
REG_O
OPC_SEL
GND/OPEN: ×0.8
REG_O: ×0.4
L/S
×0.8
+
+
+ ×0.4
+
Vref
+ du_sel
VrefR2
disable disable
uvlo
Vref1R2
TRAC_IN
SS ONOFF
0.033µF at 3.3ms
vdd
pin heap 17 pin
VIN VIN=4.5~10V
1µF
VOUT
VOUT-5
VOUT1 (Normal operation)
=5.3V to 14V
VOUT2 (Tracking operaton)
=VIN or more
4.7µF
10µH
SW
PGND
LGND
VDD
VDD=2.9~3.1V
0.1µF
No.A1277-5/9
Datasheet pdf - http://www.DataSheet4U.net/

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