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PDF LV5105FN Data sheet ( Hoja de datos )

Número de pieza LV5105FN
Descripción Power supply
Fabricantes Sanyo Semicon Device 
Logotipo Sanyo Semicon Device Logotipo



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Ordering number : EN7600A
LV5105FN
Bi-CMOS IC
For cell phone system
Power supply
Overview
The LV5105FN is a power supply for a cell phone system that integrates four series regulators, LED driver (with 5V
output) on a single chip.
Functions
REG×4 (CMOS output)
DET circuit (one for REG1, one for VBAT (with reset output)
Thermal shutdown circuit (150°C)
Three-color LED driver (charge pump 5V output incorporated)
FRONT LED driver
Mic bias output
Features
Low power consumption
Built-in charge pump circuit
Built-in 3-color LED drive circuit
4μA when REG4 and VBATDET operate
30μA when REG1, REG2, REG3, and REG4 + DET1 and VBATDET operate
VBAT : 3.2V to 4.5V, 5V constant output with a load of 80mA
Three independent colors, 128-step PWM intensity control
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
VCC max
Pd max
Topr
Tstg
Conditions
Ta 75°C *Mounted on a board.
Mounted on a 50.0mm×50.0mm×0.8mm, glass epoxy board.
Ratings
7
440
-30 to +75
-40 to +125
Unit
V
mW
°C
°C
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer's products or
equipment.
61307 TI PC B8-6484, 6703 No.7600-1/9
Datasheet pdf - http://www.DataSheet4U.net/

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LV5105FN pdf
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Continued from preceding page.
[Input voltage 5 (Vcharge)]
LV5105FN
Parameter
H level
L level
Symbol
VINH5
VINL5
Input H level
Input L level
Conditions
[Input voltage 6 (VBATBK)]
Parameter
H level
L level
Symbol
VINH6
VINL6
Input H level
Input L level
Conditions
Electrical Characteristics : Serial bus
[Serial transfer timing]
Parameter
Cycle time
Data setup time 1
Data setup time 2
Data hold time 1
Data hold time 2
Pulse width 1
Pulse width 2
Pulse width 3
Symbol
tcy1
ts0
ts1
th0
th1
tw1L
tw1H
tw2L
Conditions
SCLK clock cycle
SDEN setup time for rise of SCLK
SDATA setup time for rise of SCLK
SDEN hold time for fall of SCLK
SDATA hold time for rise of SCLK
SCLK L-period pulse width
SCLK H-period pulse width
SDEN L-period pulse width
min
4.4
0
Ratings
typ
max
6
3.6
Unit
V
V
min
REG40
×0.8
0
Ratings
typ
max
VBAT
REG40
×0.2
Unit
V
V
min
300
150
150
150
150
150
150
1
Ratings
typ
-
-
-
-
-
-
-
max
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
μs
Serial transfer timing conditions
SDEN
ts0
SCLK
SDATA
tw1L
tw1H
ts1 th1
tcy1
A7 A6 A5 A4 A3 A2 A1 A0 D15 D14 D13
th0
tw2L
50%
50%
D3 D2 D1 D0
A7
Address
Data
Data length
: 24bit
Clock frequency : 3MHz or les
"SDATA" is taken in at fall of "SDEN" when "SCLK" of 24 clock is entered during H period of "SDEN."
(Note) "SDATA" is not taken in when "SCLK" is 23 clock or less during H period of "SDEN."
When "SCLOCK" exceeds 25 clock, "SDATA" is taken in at the 24th clock, and subsequent "SDATA" is
ignored.
No.7600-5/9
Datasheet pdf - http://www.DataSheet4U.net/

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