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PDF NL204153BC21-02 Data sheet ( Hoja de datos )
| Número de pieza | NL204153BC21-02 | |
| Descripción | Display Module | |
| Fabricantes | NEC | |
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TFT COLOR LCD MODULE
NL204153BC21-02
54cm (21.3 Type)
QXGA
PRELIMINARY DATA SHEET
DOD-PD-0092 (2nd edition)
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PD-0092 (2nd edition)
Published date: July 2003 CP(N)
1
ã NEC LCD Technologies, Ltd.
2003 All rights reserved.
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1 page  
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NL204153BC21-02
2. GENERAL SPECIFICATIONS
Display area
Diagonal size of display
Drive system
Display color
Pixel
Pixel arrangement
Dot pitch
Pixel pitch
Module size
Weight
Contrast ratio
Viewing angle
Designed viewing direction
Polarizer surface
Polarizer pencil-hardness
Color gamut
Response time
Luminance
Signal system
433.152 (W) × 324.864 (H) mm (typ.)
54 cm (21.3 inches)
a-Si TFT active matrix
16,777,216 colors
2048 (H) × 1536 (V) pixels
RGB (Red dot, Green dot, Blue dot) vertical stripe
0.0705 (W) × 0.2115 (H) mm
0.2115 (W) × 0.2115 (H) mm
457.0 (W) × 350.0 (H) × 25.0 (D) mm (typ.)
4400 g (typ.)
500:1 (typ.)
At the contrast ratio 10:1
• Horizontal: Right side 85° (typ.), Left side 85° (typ.)
• Vertical: Up side 85° (typ.), Down side 85° (typ.)
Viewing angle with optimum grayscale (γ=2.2): normal axis
TBD
TBD H (min.) [by JIS K5400]
At LCD panel center
72 % (typ.) [against NTSC color space]
Ton (black 10%→ white 90%)+Toff (white 90%→ black 10%)
TBD ms (typ.)
At IBL= (6.5)mArms / lamp
235 cd/m2 (typ.)
4 ports LVDS interface (Equivalent of THC63LVD824×2pcs, THine
Electronics, Inc.)
RGB 8-bit signals, Data enable signal (DE)
Power supply voltage
LCD panel signal processing board: 12.0V
Backlight
Power consumption
Edge light type: 6 cold cathode fluorescent lamps, Inverter less
At checkered flag pattern and IBL= (6.5)mArms / lamp
TBD W (typ.)
PRELIMINARY DATA SHEET DOD-PD-0092 (2nd edition)
5
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4.4 POWER SUPPLY VOLTAGE SEQUENCE
VDD 0V
VDD ON
10.8V
5ms ≤Tr< 80ms
LVDS Signals
0V
VALID period
NL204153BC21-02
VDD OFF
Toff > 50ms
10ms<t<35ms
0<t<35ms
Note1: LVDS signals should be measured at the terminal of 100Ω resistor.
Note2: In terms of voltage variation (voltage drop) while VDD rising edge is below 10.8V, a protection
circuit may work, and then this product may not work.
Note3: LVDS signals must be Low or High-impedance, exclude the VALID period (See above
sequence diagram), in order to avoid that internal circuits is damaged.
If some of display and function signals of this product are cut while this product is working,
even if the signal input to it once again, it might not work normally. If customer stops the
display and function signals, they should be cut VDD.
Note4: The backlight power supply voltage should be inputted within the valid period, in order to
avoid unstable data display.
PRELIMINARY DATA SHEET DOD-PD-0092 (2nd edition)
11
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