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PDF FM3135 Data sheet ( Hoja de datos )
| Número de pieza | FM3135 | |
| Descripción | Integrated RTC/Alarm/F-RAM & Embedded Crystal | |
| Fabricantes | Ramtron | |
| Logotipo |  |
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www.DataSheet.co.kr
Preliminary
FM3135
Integrated RTC/Alarm/F-RAM & Embedded Crystal
Features
High Integration Device Replaces Multiple Parts
• Serial Nonvolatile Memory
• Real-time Clock (RTC) with Alarm
• Clock Output (Programmable frequency)
64Kb Ferroelectric Nonvolatile RAM
• Internally Organized as 8Kx8
• Unlimited Read/Write Endurance
• 45 year Data Retention
• NoDelay™ Writes
Fast Two-wire Serial Interface
• Up to 1 MHz Maximum Bus Frequency
• Supports Legacy Timing for 100 kHz & 400 kHz
• RTC & F-RAM Controlled via 2-wire Interface
Real-time Clock/Calendar
• Embedded 32.768 kHz Crystal
• Backup Current under 1 µA
• Seconds through Centuries in BCD format
• Tracks Leap Years through 2099
• Software Calibration
• Supports Battery or Capacitor Backup
Easy to Use Configurations
• Operates from 2.7 to 3.6V
• 20-pin “Green”/RoHS SOIC (-G)
• Low Operating Current
• Industrial Temperature -40°C to +85°C
• Underwriters Laboratory (UL) Recognized
Description
The FM3135 integrates a real-time clock (RTC) and
F-RAM nonvolatile memory. The 32.768kHz crystal
is embedded inside the package. The device operates
from 2.7 to 3.6V.
The FM3135 provides nonvolatile F-RAM which
features fast write speed and unlimited endurance.
This allows the memory to serve as extra RAM for
the system microcontroller or conventional
nonvolatile storage. This memory is truly nonvolatile
rather than battery backed.
The real-time clock (RTC) provides time and date
information in BCD format. It can be permanently
powered from external backup voltage source, either
a battery or a capacitor. The timekeeper uses a crystal
integral to the package and provides a calibration
mode that allows software adjustment of timekeeping
accuracy.
Pin Configuration
NC 1
20
NC 2
19
ACS
3
18
VDD
4
17
NC 5
16
NC 6
15
NC 7
14
NC 8
13
NC 9
12
NC 10 11
NC
VSS
SCL
SDA
VBAK
VSS
NC
NC
NC
NC
Pin Name
ACS
SDA
SCL
VBAK
VDD
VSS
Function
Alarm/Calibration/SqWave
Serial Data
Serial Clock
Battery-Backup Supply
Supply Voltage
Ground
Ordering Information
FM3135-G
“Green”/RoHS 20-pin SOIC
FM3135-GTR “Green”/RoHS 20-pin SOIC,
Tape & Reel
This is a product that has fixed target specifications but are subject
to change pending characterization results.
Rev. 1.2
Feb. 2009
Ramtron International Corporation
1850 Ramtron Drive, Colorado Springs, CO 80921
(800) 545-FRAM, (719) 481-7000
http://www.ramtron.com
Page 1 of 21
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
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FM3135 Integrated RTC/Alarm/FRAM & Embedded Crystal
Table 2. Calibration Adjustments
Positive Calibration for slow clocks: Calibration will achieve ± 2.17 PPM after calibration
Measured Frequency Range
Error Range (PPM)
Min
Max
Min Max
Program Calibration Register to:
0 512.0000
511.9989
0 2.17
000000
1 511.9989
511.9967
2.18 6.51
100001
2 511.9967
511.9944
6.52 10.85
100010
3 511.9944
511.9922
10.86
15.19
100011
4 511.9922
511.9900
15.20
19.53
100100
5 511.9900
511.9878
19.54
23.87
100101
6 511.9878
511.9856
23.88
28.21
100110
7 511.9856
511.9833
28.22
32.55
100111
8 511.9833
511.9811
32.56
36.89
101000
9 511.9811
511.9789
36.90
41.23
101001
10 511.9789
511.9767
41.24
45.57
101010
11 511.9767
511.9744
45.58
49.91
101011
12 511.9744
511.9722
49.92
54.25
101100
13 511.9722
511.9700
54.26
58.59
101101
14 511.9700
511.9678
58.60
62.93
101110
15 511.9678
511.9656
62.94
67.27
101111
16 511.9656
511.9633
67.28
71.61
110000
17 511.9633
511.9611
71.62
75.95
110001
18 511.9611
511.9589
75.96
80.29
110010
19 511.9589
511.9567
80.30
84.63
110011
20 511.9567
511.9544
84.64
88.97
110100
21 511.9544
511.9522
88.98
93.31
110101
22 511.9522
511.9500
93.32
97.65
110110
23 511.9500
511.9478
97.66
101.99
110111
24 511.9478
511.9456
102.00
106.33
111000
25 511.9456
511.9433
106.34
110.67
111001
26 511.9433
511.9411
110.68
115.01
111010
27 511.9411
511.9389
115.02
119.35
111011
28 511.9389
511.9367
119.36
123.69
111100
29 511.9367
511.9344
123.70
128.03
111101
30 511.9344
511.9322
128.04
132.37
111110
31 511.9322
511.9300
132.38
136.71
111111
Negative Calibration for fast clocks: Calibration will achieve ± 2.17 PPM after calibration
Measured Frequency Range
Error Range (PPM)
Min
Max
Min Max
Program Calibration Register to:
0 512.0000
512.0011
0 2.17
000000
1 512.0011
512.0033
2.18 6.51
000001
2 512.0033
512.0056
6.52 10.85
000010
3 512.0056
512.0078
10.86
15.19
000011
4 512.0078
512.0100
15.20
19.53
000100
5 512.0100
512.0122
19.54
23.87
000101
6 512.0122
512.0144
23.88
28.21
000110
7 512.0144
512.0167
28.22
32.55
000111
8 512.0167
512.0189
32.56
36.89
001000
9 512.0189
512.0211
36.90
41.23
001001
10 512.0211
512.0233
41.24
45.57
001010
11 512.0233
512.0256
45.58
49.91
001011
12 512.0256
512.0278
49.92
54.25
001100
13 512.0278
512.0300
54.26
58.59
001101
14 512.0300
512.0322
58.60
62.93
001110
15 512.0322
512.0344
62.94
67.27
001111
16 512.0344
512.0367
67.28
71.61
010000
17 512.0367
512.0389
71.62
75.95
010001
18 512.0389
512.0411
75.96
80.29
010010
19 512.0411
512.0433
80.30
84.63
010011
20 512.0433
512.0456
84.64
88.97
010100
21 512.0456
512.0478
88.98
93.31
010101
22 512.0478
512.0500
93.32
97.65
010110
23 512.0500
512.0522
97.66
101.99
010111
24 512.0522
512.0544
102.00
106.33
011000
25 512.0544
512.0567
106.34
110.67
011001
Rev. 1.2
Feb. 2009
Page 5 of 21
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
www.DataSheet.co.kr
CALS
CAL.4-0
00h
LB
AF
CF
POR
AEN
CAL
W
R
FM3135 Integrated RTC/Alarm/FRAM & Embedded Crystal
Calibration Sign: Determines if the calibration adjustment is applied as an addition to or as a subtraction from
the time-base. This bit can be written only when CAL=1. Battery-backed, read/write.
Calibration Code: These five bits control the calibration of the clock. These bits can be written only when
CAL=1. Battery-backed, read/write.
RTC/Alarm Control
D7 D6
D5
D4 D3 D2 D1 D0
LB
AF
CF
POR
AEN
CAL
W
R
Low Battery Flag: If the VBAK source drops to a voltage level insufficient to operate the RTC/alarm, this bit
will be set to ‘1’. All registers need to be re-initialized since the battery-backed register values should be
treated as unknown. The user should clear it to ‘0’ when initializing the system. Battery-backed. Read/Write
(internally set, user can clear bit by writing to a ‘0’).
Alarm Flag: This read-only bit is set to 1 when the time/date match the values stored in the alarm registers with
the Match bit(s) = 0. It is cleared when the RTC/Alarm Control register is read. Battery-backed.
Century Overflow Flag: This read-only bit is set to a 1 when the values in the years register overflows from 99
to 00. This indicates a new century, such as going from 1999 to 2000 or 2099 to 2100. The user should record
the new century information as needed. This bit is cleared when the RTC/Alarm Control register is read.
Battery-backed.
Power On Reset Flag: When VDD drops below VSW, the POR bit will be set to ‘1’. Battery-backed.
Read/Write (internally set, user can clear bit by writing to a ‘0’).
Alarm Enable: This bit enables the alarm function. When AEN is set (and CAL cleared), the ACS pin operates
as an active-low alarm and the AF flag function is enabled. The function of the ACS pin is detailed in Table 3.
When AEN is cleared, no new alarm events will occur but the AF flag and ACS pin will not be cleared.
Battery-backed, read/write.
Calibration Mode: When CAL is set to ‘1’, the clock enters calibration mode. When CAL is set to ‘0’, the clock
operates normally, and the ACS pin is controlled by the RTC alarm. Battery-backed, read/write.
Write RTC: Setting the W bit to ‘1’ freezes updates of the user timekeeping registers. The user can then write
them with updated values. Setting the W bit to ‘0’ causes the contents of the time registers to be transferred to
the timekeeping counters. Battery-backed, read/write.
Read RTC: Setting the R bit to ‘1’ copies a static image of the timekeeping core and place it into the user
registers. The user can then read them without concerns over changing values causing system errors. The R bit
going from ‘0’ to ‘1’ causes the timekeeping capture, so the bit must be returned to ‘0’ prior to reading again.
Battery-backed, read/write.
Rev. 1.2
Feb. 2009
Page 11 of 21
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet FM3135.PDF ] | |
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