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Número de pieza | S-25A256B | |
Descripción | OPERATION SPI SERIAL E2PROM | |
Fabricantes | Seiko | |
Logotipo | ||
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www.sii-ic.com
© Seiko Instruments Inc., 2011-2014
FOR AUTOMOTIVE 125°C OPERATION
SPI SERIAL E2PROM
Rev.1.2_00
This IC is a SPI serial E2PROM which operates under the high temperature, at high speed, with the wide range operation for
automotive components. This IC has the capacity of 256 K-bit and the organization of 32768 words × 8-bit. Page write and
Sequential read are available.
Caution Before using the product in automobile control unit or medical equipment, contact to SII is indispensable.
Features
Package
• Operating voltage range
Read:
2.5 V ~ 5.5 V
Write:
2.5 V ~ 5.5 V
• Operation frequency:
• Write time:
• SPI mode (0, 0) and (1, 1)
• Page write:
• Sequential read
• Write protect:
Protect area:
5.0 MHz max.
5.0 ms max.
64 bytes / page
Software, Hardware
25%, 50%, 100%
• Monitoring of a write memory state by the status register
• Function to prevent malfunction by monitoring clock pulse
• Write protect function during the low power supply voltage
• CMOS schmitt input ( CS , SCK, SI, WP , HOLD )
• Endurance*1:
106 cycle / word *2 (Ta = +25°C)
3 × 105 cycle / word *2 (Ta = +125°C)
• Data retention:
100 years (Ta = +25°C)
50 years (Ta = +125°C)
• Memory capacity:
256 K-bit
• Initial delivery state:
FFh, SRWD = 0, BP1 = 0, BP0 = 0
• Burn-in specifications:
Wafer level burn-in
• Operation temperature range: Ta = −40°C to +125°C
• Lead-free (Sn 100%), halogen-free*3
• AEC-Q100 qualified*4
• 8-Pin SOP (JEDEC)
5
8
4
1
(5.0 × 6.0 × t1.75 mm)
*1. Refer to " Endurance" for details.
*2. For each address (Word: 8-bit)
*3. Refer to " Product Name Structure" for details.
*4. Contact our sales office for details.
Remark Refer to "3. Product name list" in " Product Name Structure" for details of package and product.
Seiko Instruments Inc.
1
1 page Rev.1.2_00
FOR AUTOMOTIVE 125°C OPERATION SPI SERIAL E2PROM
S-25A256B
DC Electrical Characteristics
Item
Symbol
Condition
Current
(read)
consumption
ICC1
No load at SO pin
Table 9
Ta = −40°C to +125°C
VCC = 2.5 V to 4.5 V
fSCK = 5.0 MHz
VCC = 4.5 V to 5.5 V
fSCK = 5.0 MHz
Min. Max. Min. Max.
- 2.0 - 2.5
Table 10
Item
Symbol
Condition
Current consumption
(write)
ICC2
No load at SO pin
Ta = −40°C to +125°C
VCC = 2.5 V to 5.5 V
fSCK = 5.0 MHz
Min. Max.
- 4.0
Table 11
Item
Symbol
Condition
Standby current
consumption
ISB
Input leakage current ILI
Output leakage current ILO
Low level
VOL1
output voltage
VOL2
High level
VOH1
output voltage
VOH2
CS = VCC,
SO = Open
Other inputs are
VCC or GND
VIN = GND to VCC
VOUT = GND to VCC
IOL = 2.0 mA
IOL = 1.5 mA
IOH = −2.0 mA
IOH = −0.4 mA
Ta = −40°C to +125°C
VCC = 2.5 V to 4.5 V
VCC = 4.5 V to 5.5 V
Min. Max. Min. Max.
- 8.0 - 10.0
- 2.0 - 2.0
- 2.0 - 2.0
- - - 0.4
- 0.4 - 0.4
- - 0.8 × VCC -
0.8 × VCC - 0.8 × VCC -
Unit
mA
Unit
mA
Unit
μA
μA
μA
V
V
V
V
Seiko Instruments Inc.
5
5 Page Rev.1.2_00
FOR AUTOMOTIVE 125°C OPERATION SPI SERIAL E2PROM
S-25A256B
1. 2 BP1, BP0 (b3, b2) : Block Protect
Bit BP1 and BP0 are composed of the nonvolatile memory. The area size of Software Protect against WRITE
instruction is defined by them. Rewriting these bits is possible by the WRSR instruction. To protect the memory
area against the WRITE instruction, set either or both of bit BP1 and BP0 to "1". Rewriting bit BP1 and BP0 is
possible unless they are in Hardware Protect mode. Refer to " Protect Operation" for details of Block Protect.
1. 3 WEL (b1) : Write Enable Latch
Bit WEL shows the status of internal Write Enable Latch. Bit WEL is set by the WREN instruction only. If bit WEL
is "1", this is the status that Write Enable Latch is set. If bit WEL is "0", Write Enable Latch is in reset, so that this
IC does not receive the WRITE or WRSR instruction. Bit WEL is reset after these operations;
• The power supply voltage is dropping
• At power-on
• After performing WRDI
• After the completion of write operation by the WRSR instruction
• After the completion of write operation by the WRITE instruction
1. 4 WIP (b0) : Write In Progress
Bit WIP is read only and shows whether the internal memory is in the write operation or not by the WRITE or
WRSR instruction. Bit WIP is "1" during the write operation but "0" during any other status. Figure 9 shows the
usage example.
CS
WRITE or WRSR instruction
RDSR instruction
SI
D2 D1 D0
RDSR
S
R BB
W
D
PP
10
SO 000 11
WEL, WIP
tPR
RDSR instruction
RDSR
S
R
W
D
BB
PP
10
000 11
WEL, WIP
RDSR instruction
RDSR
S
R BB
W
D
PP
10
000 00
WEL, WIP
Figure 9 Usage Example of WEL, WIP Bits during Write
2. Write enable (WREN)
Before writing data (WRITE and WRSR), be sure to set bit Write Enable Latch (WEL). This instruction is to set bit
WEL. Its operation is below.
After selecting this IC by the chip select ( CS ), input the instruction code from serial data input (SI). To set bit WEL,
set this IC in the non-select status by CS at the 8th clock of the serial clock (SCK). To cancel the WREN instruction,
input the clock different from a specified value (n = 8 clock) while CS is in "L".
Seiko Instruments Inc.
11
11 Page |
Páginas | Total 23 Páginas | |
PDF Descargar | [ Datasheet S-25A256B.PDF ] |
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