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PDF NCV8772 Data sheet ( Hoja de datos )
| Número de pieza | NCV8772 | |
| Descripción | Ultra Low Iq 350 mA LDO Regulator | |
| Fabricantes | ON Semiconductor | |
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NCV8772
Ultra Low Iq 350 mA LDO
Regulator with Enable and
Reset
The NCV8772 is 350 mA LDO regulator with integrated reset
functions dedicated for microprocessor applications. Its robustness allows
NCV8772 to be used in severe automotive environments. Ultra low
quiescent current as low as 24 mA typical makes it suitable for
applications permanently connected to battery requiring ultra low
quiescent current with or without load. This feature is especially critical
when modules remain in active mode when ignition is off. The Enable
function can be used for further decrease of quiescent current in
shutdown mode to 1 mA. The NCV8772 contains protection functions as
current limit, thermal shutdown and reverse output current protection.
Features
• Output Voltage Options: 5 V
• Output Voltage Accuracy: ±1.5% (TJ = 25°C to 125°C)
• Output Current up to 350 mA
• Ultra Low Quiescent Current: typ 24 mA (max 30 mA)
• Very Wide Range of Cout and ESR Values for Stability
• Enable Function
− 1 mA Max Quiescent Current when disabled
• Microprocessor Compatible Control Functions:
− Reset with Adjustable Power−On Delay
• Wide Input Voltage Operation Range: up to 40 V
• Protection Features
− Current Limitation
− Thermal Shutdown
− Reverse Output Current Protection
• These are Pb−Free Devices
Typical Applications
• Body Control Module
• Instruments and Clusters
• Occupant Protection and Comfort
• Powertrain
VBAT
Cin
0.1 mF
Vin Vout
NCV8772
DT*
Vout
Cout
1 mF
VDD
Microprocessor
OFF ON
EN RO
GND
RESET
* D2PAK−7 ONLY
Figure 1. Typical Application Schematic
http://onsemi.com
MARKING
DIAGRAMS
D2PAK−5
D5S SUFFIX
CASE 936A
NC
V8772yxx
AWLYWWG
D2PAK−7
NC
D7S SUFFIX
V8772yxx
CASE 936AB AWLYWWG
1
1
y
x, xx
A
WL
Y
WW
G
= Timing and Reset Threshold Option
= Voltage Option
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
March, 2011 − Rev. 2
1
Publication Order Number:
NCV8772/D
Datasheet pdf - http://www.DataSheet4U.net/
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NCV8772
ELECTRICAL CHARACTERISTICS Vin = 13.2 V, VEN = 3 V, Cin = 0.1 mF, Cout = 1 mF, for typical values TJ = 25°C, for min/max
values TJ = −40°C to 150°C; unless otherwise noted. (Notes 9 and 10)
Parameter
Test Conditions
Symbol Min Typ Max Unit
DT (RESET DELAY TIME SELECT) − D2PAK−7 ONLY
DT Threshold Voltage
Logic Low
Logic High
Vth(DT)
−
V
− 0.8
2.0 −
−
DT Input Current
RESET OUTPUT RO
VDT = 5 V
IDT −
− 1.0 mA
Output Voltage Reset Threshold
(Note 13)
(NCV8772y) where y = 1,2,3,...
(NCV8772y) where y = A,B,C,...
Vout decreasing, Vin > 5.5 V
5.0 V
5.0 V
VRT
%Vout
90 93 96
87 90 93
Reset Hysteresis
Maximum Reset Sink Current
Reset Output Low Voltage
Reset Output High Voltage
Integrated Reset Pull−up Resistor
Reset Delay Time (D2PAK−5)
(Note 13)
Vout = 4.5 V, VRO = 0.25 V
Vout > 1 V, IRO < 200 mA
VRH
IROmax
VROL
VROH
RRO
tRD
−
1.75
−
4.5
15
6.4
(−20%)
2.0
−
0.15
−
30
8
−
−
0.25
−
50
9.6
(+20%)
%Vout
mA
V
V
kW
ms
Reset Delay Time (D2PAK−7)
(Note 13)
Min Available Time, DT connected to GND
Max Available Time, DT connected to Vout
tRD 3.2 4 4.8 ms
102.4 128 153.6
(−20%)
(+20%)
Reset Reaction Time (see Figure 24)
THERMAL SHUTDOWN
tRR 16 25 38 ms
Thermal Shutdown Temperature
(Note 12)
TSD 150 175 195
°C
Thermal Shutdown Hysteresis
(Note 12)
TSH − 25 − °C
9. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area.
10. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA [ TJ. Low duty
cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
11. Measured when output voltage falls 100 mV below the regulated voltage at Vin = 13.2 V.
12. Values based on design and/or characterization.
13. See APPLICATION INFORMATION section for Reset Thresholds and Reset Delay Time Options
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NCV8772
APPLICATIONS INFORMATION
The NCV8772 regulator is self−protected with internal
thermal shutdown and internal current limit. Typical
characteristics are shown in Figure 4 to Figure 24.
Input Decoupling (Cin)
A ceramic or tantalum 0.1 mF capacitor is recommended
and should be connected close to the NCV8772 package.
Higher capacitance and lower ESR will improve the overall
line and load transient response.
If extremely fast input voltage transients are expected then
appropriate input filter must be used in order to decrease
rising and/or falling edges below 50 V/ms for proper
operation. The filter can be composed of several capacitors
in parallel.
Output Decoupling (Cout)
The NCV8772 is a stable component and does not require
a minimum Equivalent Series Resistance (ESR) for the
output capacitor. Stability region of ESR vs Output Current
is shown in Figure 13. The minimum output decoupling
value is 1 mF and can be augmented to fulfill stringent load
transient requirements. The regulator works with ceramic
chip capacitors as well as tantalum devices. Larger values
improve noise rejection and load regulation transient
response.
Enable Operation
The Enable pin will turn the regulator on or off. The
threshold limits are covered in the electrical characteristics
table in this datasheet.
Reset Operation
A reset signal is provided on the Reset Output (RO) pin to
provide feedback to the microprocessor of an out of
regulation condition. The timing diagram of reset function
is shown in Figure 24. This is in the form of a logic signal on
RO. Output voltage conditions below the RESET threshold
cause RO to go low. The RO integrity is maintained down
to Vout = 1.0 V. For 5 V voltage option, the Reset Output
(RO) circuitry includes internal pull−up (30 kW) connected
to the output (Vout) No external pull−up is necessary.
RESET DELAY AND RESET THRESHOLD OPTIONS
(D2PAK−5)
Reset Delay Time Reset Threshold
NCV87721D5S
8 ms
93%
NCV87722D5S
16 ms
93%
NCV87723D5S
32 ms
93%
NCV87724D5S
64 ms
93%
NCV87725D5S
128 ms
93%
NCV8772AD5S
8 ms
90%
NCV8772BD5S
16 ms
90%
NCV8772CD5S
32 ms
90%
NCV8772DD5S
64 ms
90%
NCV8772ED5S
128 ms
90%
NOTE: The timing values can be selected from the following list:
8, 16, 32, 64, 128 ms. Contact factory for options not
included in ORDERING INFORMATION table on page 12.
Reset Delay Time Select (D2PAK−7 only)
Selection of the NCV8772yD7S devices and the state of
the DT pin determines the available Reset Delay times. The
part is designed for use with DT tied to ground or Vout, but
may be controlled by any logic signal which provides a
threshold between 0.8 V and 2 V. The default condition for
an open DT pin is the slower Reset time (DT = GND
condition). Times are in pairs and are highlighted in the chart
below. Consult factory for availability. The Delay Time
select (DT) pin is logic level controlled and provides Reset
Delay time per the chart. Note the DT pin is sampled only
when RO is low, and changes to the DT pin when RO is high
will not effect the reset delay time.
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