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PDF NL8060BC31-27 Data sheet ( Hoja de datos )
| Número de pieza | NL8060BC31-27 | |
| Descripción | LCD Module | |
| Fabricantes | NEC | |
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TFT COLOR LCD MODULE
NL8060BC31-27
30.8cm (12.1 Type)
SVGA
DATA SHEET
DOD-PD-0821 (5th edition)
This DATA SHEET is updated document from
DOD-PD-0725(4).
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PD-0821 (5th edition)
Published date: February 2005 CP(N)
1 © NEC LCD Technologies, Ltd.
2004,2005 All rights reserved.
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NL8060BC31-27
2. GENERAL SPECIFICATIONS
Display area
Diagonal size of display
Drive system
Display color
Pixel
Pixel arrangement
Dot pitch
Pixel pitch
Module size
Weight
Contrast ratio
Viewing angle
Designed viewing direction
Polarizer surface
Polarizer pencil-hardness
Color gamut
Response time
Luminance
Signal system
Power supply voltage
Backlight
Power consumption
246.0 (H) × 184.5 (V) mm (typ.)
30.8 cm (12.1 inches)
a-Si TFT active matrix
262,144 colors
800 (H) × 600 (V) pixels
RGB (Red dot, Green dot, Blue dot) vertical stripe
0.1025 (H) × 0.3075 (V) mm
0.3075 (H) × 0.3075 (V) mm
280.0 (W) × 210.0 (H) × 13.0 (D) mm (typ.)
740 g (typ.)
600:1 (typ.)
At the contrast ratio ≥10:1
• Horizontal: Right side 70° (typ.), Left side 70° (typ.)
• Vertical: Up side 45° (typ.), Down side 55° (typ.)
At DPS= Low or open: normal scan
• Viewing direction without image reversal: up side (12 o'clock)
• Viewing direction with contrast peak: down side (6 o'clock)
• Viewing angle with optimum grayscale (γ=2.2): normal axis
Clear
3H (min.) [by JIS K5400]
At LCD panel center
40 % (typ.) [against NTSC color space]
Ton+Toff (10%←→ 90%)
33 ms (typ.)
At IBL= 5.0mArms / lamp
400 cd/m2 (typ.)
6-bit digital signals for data of RGB colors,
Dot clock (CLK), Data enable (DE),
Horizontal synchronous signal (Hsync),
Vertical synchronous signal (Vsync)
LCD panel signal processing board: 3.3V or 5.0V
Edge light type: 2 cold cathode fluorescent lamps
Replaceable part
• Lamp holder set: Type No. 121LHS18
Recommended inverter (Option)
• Inverter: Type No. 121PW181
At IBL=5.0mArms / lamp and checkered flag pattern
6.4 W (typ.) (Power dissipation of the inverter is not included.)
DATA SHEET DOD-PD-0821 (5th edition)
5
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4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
VCC
Note1
3.0V or 4.75V
0V
ON
10µs ≤ Tr < 50ms
Display and
function signals
Note2
0ms < t < 35ms
VALID period
NL8060BC31-27
OFF
0.3V
Toff ≥50ms
0ms < t < 35ms
Note1: In terms of voltage variation (voltage drop) while VCC rising edge is below 3.0V in "VCC =
3.3V" or 4.75V in "VCC = 5.0V", a protection circuit may work, and then this product may
not work.
Note2: Display signals (CLK, Hsync, Vsync, DE, R0 to R5, G0 to G5, B0 to B5) and function signal
(DPS) must be Low or High-impedance, exclude the VALID period (See above sequence
diagram), in order to avoid that internal circuits is damaged.
If some of display and function signals of this product are cut while this product is working,
even if the signal input to it once again, it might not work normally. If customer stops the
display and function signals, they should be cut VCC.
4.4.2 Inverter (Option)
Display and
function signals
Note1
Note2
VALID period
VDDB
Note1: These are the display and function signals for LCD panel signal processing board.
Note2: The inverter power supply voltage (VDDB) should be inputted within the valid period of
display and function signals, in order to avoid unstable data display.
DATA SHEET DOD-PD-0821 (5th edition)
11
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