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PDF NL8048BC24-09D Data sheet ( Hoja de datos )
| Número de pieza | NL8048BC24-09D | |
| Descripción | LCD Module | |
| Fabricantes | NEC | |
| Logotipo |  |
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TFT COLOR LCD MODULE
NL8048BC24-09D
23cm (9.0 Type)
WVGA
LVDS interface (1port)
PRELIMINARY DATA SHEET
DOD-PP-0962 (3rd edition)
This PRELIMINARY DATA SHEET is updated
document from DOD-PP-0831(2).
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PP-0962 (3rd edition)
www.DPuatbaliSshheeedt4dUa.tnee: tMarch 2010 CP(N)
1
© NEC LCD Technologies, Ltd.
2009-2010 All rights reserved.
1 page  
NL8048BC24-09D
2. GENERAL SPECIFICATIONS
Display area
Diagonal size of display
Drive system
Display color
Pixel
Pixel arrangement
Dot pitch
Pixel pitch
Module size
Weight
Contrast ratio
Viewing angle
Designed viewing direction
Polarizer surface
Polarizer pencil-hardness
Color gamut
Response time
Luminance
Signal system
Power supply voltage
196.8 (H) × 118.08 (V) mm
23cm (9.0 inches)
a-Si TFT active matrix
16,777,216 colors (At 8-bit input, FRC terminal= High)
262,144 colors (At 6-bit input, FRC terminal= Low or Open)
800 (H) × 480 (V) pixels
RGB (Red dot, Green dot, Blue dot) vertical stripe
0.082 (H) × 0.246 (V) mm
0.246 (H) × 0.246 (V) mm
220.5 (W) × 136.5 (H) × 8.2 (D) mm (typ.)
TBD g (typ.)
(600:1)(typ.)
At the contrast ratio ≥10:1
• Horizontal: Right side 88° (typ.), Left side 88° (typ.)
• Vertical: Up side 88° (typ.), Down side 88° (typ.)
At DPS= Low or Open: Normal scan
• Viewing angle with optimum grayscale (γ≒ 2.2): Normal axis
(perpendicular)
Antiglare
3H (min.) [by JIS K5400]
At LCD panel center
60 % (typ.) [against NTSC color space]
Ton+Toff (10%←→ 90%)
(25) ms (typ.)
At IL= 50 mA/One circuit
(400) cd/m2 (typ.)
LVDS interface (1port)
(Receiver: THC63LVDF84B, THine Electronics Inc. or equivalent)
8bit/6bit digital signals for data of RGB colors, Dot clock (CLK),
Data enable (DE)
LCD panel signal processing board: 3.3V
LED backlight type:
Backlight
Power consumption
Replaceable part
• Lamp holder set: Type No. TBD
Recommended LED Driver Board (Option)
• LED Driver Board: Type No. 104PW03F
At IL= 50 mA/One circuit, Checkered flag pattern
(4.4) W (typ.)
3
3
3
3
PRELIMINARY DATA SHEET DOD-PP-0962 (3rd edition)
5
5 Page 
4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
VCC
Note1
0V
ON
3.0V
10μs≤Tr < 50ms
Display signals*
Function signals
Note2
0V
0ms < t < 35ms
VALID period
NL8048BC24-09D
OFF
ON
0.3V
Toff≥50ms
0ms < t < 35ms
* These signals should be measured at the terminal of 100Ω resistance.
Note1: If there is a voltage variation (voltage drop) at the rising edge of VCC below 3.0V, there is a
possibility that a product does not work due to a protection circuit.
Note2: Display signals (D0+/-, D1+/-, D2+/-, D3+/-, CLK+/-) and function signals (DPS, FRC, MSL)
must be set to Low or High-impedance, except the VALID period (See above sequence
diagram), in order to avoid the circuitry damage.
If some of display and function signals of this product are cut while this product is working,
even if the signal input to it once again, it might not work normally. If a customer stops the
display and function signals, VCC also must be shut down.
3
3
4.4.2 LED driver board (Option)
Display signals,
Function signals
Note1
Note2
VALID period
LED backlight: ON
Note1: These are the display and function signals for LCD panel signal processing board.
Note2: The backlight should be turned on within the valid period of display and function signals, in
order to avoid unstable data display.
PRELIMINARY DATA SHEET DOD-PP-0962 (3rd edition)
11
11 Page | ||
| Páginas | Total 34 Páginas | |
| PDF Descargar | [ Datasheet NL8048BC24-09D.PDF ] | |
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