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PDF ADG5212 Data sheet ( Hoja de datos )
| Número de pieza | ADG5212 | |
| Descripción | (ADG5212 / ADG5213) Quad SPST Switches | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
Latch-up proof
3 pF off source capacitance
5 pF off drain capacitance
0.07 pC charge injection
Low leakage: 0.2 nA maximum at 85ºC
±9 V to ±22 V dual-supply operation
9 V to 40 V single-supply operation
48 V supply maximum ratings
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
VSS to VDD analog signal range
APPLICATIONS
Automatic test equipment
Data acquisition
Instrumentation
Avionics
Audio and video switching
Communication systems
GENERAL DESCRIPTION
The ADG5212/ADG5213 contain four independent single-
pole/single-throw (SPST) switches. The ADG5212 switches
turn on with Logic 1. The ADG5213 has two switches with
digital control logic similar to that of the ADG5212; however,
the logic is inverted on the other two switches. Each switch
conducts equally well in both directions when on, and each
switch has an input signal range that extends to the supplies.
In the off condition, signal levels up to the supplies are blocked.
The ADG5212 and ADG5213 do not have a VL pin. The digital
inputs are compatible with 3 V logic inputs over the full
operating supply range.
The ultralow capacitance and charge injection of these switches
make them ideal solutions for data acquisition and sample-and-
hold applications, where low glitch and fast settling are required.
Fast switching speed together with high signal bandwidth make
the parts suitable for video signal switching.
High Voltage Latch-Up Proof,
Quad SPST Switches
ADG5212/ADG5213
FUNCTIONAL BLOCK DIAGRAMS
S1
IN1
D1
IN2
ADG5212
IN3
S2
D2
S3
D3
S4
IN4
D4
S1
IN1
D1
IN2
ADG5213
IN3
S2
D2
S3
D3
S4
IN4
D4
SWITCHES SHOWN FOR A LOGIC 1 INPUT.
Figure 1.
PRODUCT HIGHLIGHTS
1. Trench Isolation Guards Against Latch-Up.
A dielectric trench separates the P and N channel transistors,
thereby preventing latch-up even under severe overvoltage
conditions.
2. Ultralow Capacitance and <1 pC Charge Injection.
3. Dual-Supply Operation.
For applications where the analog signal is bipolar, the
ADG5212/ADG5213 can be operated from dual supplies of
up to ±22 V.
4. Single-Supply Operation.
For applications where the analog signal is unipolar, the
ADG5212/ADG5213 can be operated from a single rail
power supply of up to 40 V.
5. 3 V Logic-Compatible Digital Inputs.
VINH = 2.0 V, VINL = 0.8 V.
6. No VL Logic Power Supply Required.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
1 page  
ADG5212/ADG5213
Parameter
POWER REQUIREMENTS
IDD
ISS
25°C −40°C to +85°C
50
70
0.001
VDD/VSS
1 Guaranteed by design; not subject to production test.
−40°C to +125°C
110
1
±9/±22
Unit
μA typ
μA max
μA typ
μA max
V min/V max
Test Conditions/Comments
VDD = +22 V, VSS = −22 V
Digital inputs = 0 V or VDD
Digital inputs = 0 V or VDD
GND = 0 V
12 V SINGLE SUPPLY
VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
25°C −40°C to +85°C
350
−40°C to +125°C
0 V to VDD
Unit
V max
Ω typ
500 610
On-Resistance Match Between Channels, ∆RON 4
20 21
On-Resistance Flatness, RFLAT(ON)
160
280 335
LEAKAGE CURRENTS
Source Off Leakage, IS (Off)
0.01
700
22
370
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
Drain Off Leakage, ID (Off)
0.1 0.2
0.01
0.4
nA max
nA typ
Channel On Leakage, ID (On), IS (On)
0.1 0.2
0.02
0.4
nA max
nA typ
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
tON
tOFF
Break-Before-Make Time Delay, tD
(ADG5213 Only)
Charge Injection, QINJ
0.2 0.25
0.002
3
235
290 360
165
205 235
85
−0.5
0.9
2.0
0.8
±0.1
410
260
50
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
Off Isolation
−105
dB typ
Channel-to-Channel Crosstalk
−105
dB typ
−3 dB Bandwidth
340
MHz typ
Test Conditions/Comments
VS = 0 V to 10 V, IS = −1 mA,
see Figure 24
VDD = 10.8 V, VSS = 0 V
VS = 0 V to 10 V, IS = −1 mA
VS = 0 V to 10 V, IS = −1 mA
VDD = 13.2 V, VSS = 0 V
VS = 1 V/10 V, VD = 10 V/1 V,
see Figure 23
VS = 1 V/10 V, VD = 10 V/1 V,
see Figure 23
VS = VD = 1 V/10 V,
see Figure 26
VIN = VGND or VDD
RL = 300 Ω, CL = 35 pF
VS = 8 V, see Figure 30
RL = 300 Ω, CL = 35 pF
VS = 8 V, see Figure 30
RL = 300 Ω, CL = 35 pF
VS1 = VS2 = 8 V, see Figure 29
VS = 6 V, RS = 0 Ω, CL = 1 nF,
see Figure 31
RL = 50 Ω, CL = 5 pF, f = 1 MHz,
see Figure 25
RL = 50 Ω, CL = 5 pF, f = 1 MHz,
see Figure 27
RL = 50 Ω, CL = 5 pF, see
Figure 28
Rev. 0 | Page 5 of 20
5 Page 
500
450
400 TA = +125°C
340 TA = +85°C
300
250 TA = +25°C
200 TA = –40°C
150
100
50 VDD = 12V
0 VSS = 0V
02
468
VS, VD (V)
10 12
Figure 10. RON as a Function of VS, VD for Different Temperatures,
12 V Single Supply
250
VDD = 36V
VSS = 0V
200
TA = +125°C
150 TA = +85°C
100 TA = +25°C
TA = –40°C
50
0
0 5 10 15 20 25 30 35
VS, VD (V)
Figure 11. RON as a Function of VS,VD for Different Temperatures,
36 V Single Supply
40
ID, IS (ON) + +
20 ID (OFF) – + IS (OFF) + –
0
–20
IS (OFF) – +
–40
–60
ID (OFF) + –
–80
–100
–120
–140
VDD = +15V
VSS = –15V
VBIAS = +10V/–10V
0 25
ID, IS (ON) – –
50 75
TEMPERATURE (°C)
100
125
Figure 12. Leakage Currents vs. Temperature, ±15 V Dual Supply
ADG5212/ADG5213
100
ID, IS (ON) + +
IS (OFF) + –
50 ID (OFF) – +
0
IS (OFF) – +
–50
–100
ID (OFF) + –
–150
–200
VDD = +20V
VSS = –20V
VBIAS = +15V/–15V
0 25
ID, IS (ON) – –
50 75
TEMPERATURE (°C)
100
125
Figure 13. Leakage Currents vs. Temperature, ±20 V Dual Supply
40
ID, IS (ON) + +
20
0
ID (OFF) – +
IS (OFF) + –
–20
IS (OFF) – +
–40
–60
ID (OFF) + –
–80
–100
–120
–140
VDD = 12V
VSS = 0V
VBIAS = 1V/10V
0 25
ID, IS (ON) – –
50 75
TEMPERATURE (°C)
100
125
Figure 14. Leakage Currents vs. Temperature, 12 V Single Supply
50
IS (OFF) + –
0
ID, IS (ON) + +
–50
ID (OFF) – +
IS (OFF) – +
–100
–150
ID (OFF) + –
–200
–250
VDD = 36V
VSS = 0V
VBIAS = 1V/30V
0 25
ID, IS (ON) – –
50 75
TEMPERATURE (°C)
100
125
Figure 15. Leakage Currents vs. Temperature, 36 V Single Supply
Rev. 0 | Page 11 of 20
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet ADG5212.PDF ] | |
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