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PDF ADG5204 Data sheet ( Hoja de datos )
| Número de pieza | ADG5204 | |
| Descripción | 4-Channel Multiplexer | |
| Fabricantes | Analog Devices | |
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FEATURES
Latch-up proof
3 pF off source capacitance
26 pF off drain capacitance
−0.6 pC charge injection
Low leakage: 0.4 nA maximum at 85°C
±9 V to ±22 V dual-supply operation
9 V to 40 V single-supply operation
48 V supply maximum ratings
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
VSS to VDD analog signal range
APPLICATIONS
Automatic test equipment
Data acquisition
Instrumentation
Avionics
Audio and video switching
Communication systems
GENERAL DESCRIPTION
The ADG5204 is a complementary metal oxide semiconductor
(CMOS) analog multiplexer, comprising four single channels.
The ultralow capacitance and charge injection of these switches
make them ideal solutions for data acquisition and sample-and-
hold applications, where low glitch and fast settling are required.
Fast switching speed together with high signal bandwidth make
the ADG5204 suitable for video signal switching.
The ADG5204 is designed on a trench process, which guards
against latch-up. A dielectric trench separates the P and N
channel transistors, thereby preventing latch-up even under
severe overvoltage conditions.
The ADG5204 switches one of four inputs to a common output,
D, as determined by the 3-bit binary address lines, A0, A1, and
EN. Logic 0 on the EN pin disables the device. Each switch con-
ducts equally well in both directions when on, and each switch
has an input signal range that extends to the supplies. In the off
condition, signal levels up to the supplies are blocked. All switches
exhibit break-before-make switching action.
High Voltage, Latch-Up Proof,
4-Channel Multiplexer
ADG5204
FUNCTIONAL BLOCK DIAGRAM
ADG5204
S1
S2
D
S3
S4
1 OF 4
DECODERS
A0 A1 EN
Figure 1.
PRODUCT HIGHLIGHTS
1. Trench Isolation Guards Against Latch-Up.
A dielectric trench separates the P and N channel transistors,
thereby preventing latch-up even under severe overvoltage
conditions.
2. Ultralow Capacitance and <1 pC Charge Injection.
3. Dual-Supply Operation.
For applications where the analog signal is bipolar, the
ADG5204 can be operated from dual supplies up to ±22 V.
4. Single-Supply Operation.
For applications where the analog signal is unipolar, the
ADG5204 can be operated from a single rail power supply
up to 40 V.
5. 3 V Logic-Compatible Digital Inputs.
VINH = 2.0 V, VINL = 0.8 V.
6. No VL Logic Power Supply Required.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
1 page  
ADG5204
12 V SINGLE SUPPLY
VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
On-Resistance Match
Between Channels, ∆RON
On-Resistance Flatness, RFLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage, IS (Off)
Drain Off Leakage, ID (Off)
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
Transition Time, tTRANSITION
tON (EN)
tOFF (EN)
Break-Before-Make Time Delay, tD
Charge Injection, QINJ
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
Insertion Loss
CS (Off)
CD (Off)
CD, CS (On)
POWER REQUIREMENTS
IDD
VDD
25°C −40°C to +85°C −40°C to +125°C Unit
Test Conditions/Comments
340
500 610
5
20 21
145
280 335
0.01
0.1 0.2
0.01
0.1 0.4
0.02
0.2 0.5
0 V to VDD
700
22
370
0.4
1.2
1.2
V max
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
VS = 0 V to 10 V, IS = −1 mA, see Figure 24
VDD = 10.8 V, VSS = 0 V
VS = 0 V to 10 V, IS = −1 mA
VS = 0 V to 10 V, IS = −1 mA
VDD = 13.2 V, VSS = 0 V
VS = 1 V/10 V, VD = 10 V/1 V, see Figure 23
VS = 1 V/10 V, VD = 10 V/1 V, see Figure 23
VS = VD = 1 V/10 V, see Figure 26
0.002
3
2.0 V min
0.8 V max
μA typ
VIN = VGND or VDD
±0.1 μA max
pF typ
240
350 445
250
335 420
160
195 220
140
−1.2
−80
−80
106
−11
3.5
29
33
40
515
485
240
60
65
9/40
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
dB typ
pF typ
pF typ
pF typ
μA typ
μA max
V min/max
RL = 300 Ω, CL = 35 pF
VS = 8 V, see Figure 29
RL = 300 Ω, CL = 35 pF
VS = 8 V, see Figure 31
RL = 300 Ω, CL = 35 pF
VS = 8 V, see Figure 31
RL = 300 Ω, CL = 35 pF
VS1 = VS2 = 8 V, see Figure 30
VS = 6 V, RS = 0 Ω, CL = 1 nF, see Figure 32
RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 25
RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 28
RL = 50 Ω, CL = 5 pF, see Figure 27
RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 27
VS = 6 V, f = 1 MHz
VS = 6 V, f = 1 MHz
VS = 6 V, f = 1 MHz
VDD = 13.2 V
Digital inputs = 0 V or VDD
GND = 0 V, VSS = 0 V
1 Guaranteed by design; not subject to production test.
Rev. 0 | Page 5 of 20
5 Page 
500
450
400 TA = +125°C
340 TA = +85°C
300
250 TA = +25°C
200 TA = –40°C
150
100
50 VDD = 12V
0 VSS = 0V
02
468
VS, VD (V)
10 12
Figure 10. RON as a Function of VD or VS for Different Temperatures,
12 V Single Supply
250
VDD = 36V
VSS = 0V
200
TA = +125°C
150 TA = +85°C
100 TA = +25°C
TA = –40°C
50
0
0 5 10 15 20 25 30 35
VS, VD (V)
Figure 11. RON as a Function of VD or VS for Different Temperatures,
36 V Single Supply
10
ID (OFF) – + ID, IS (ON) + +
IS (OFF) + –
0
–10 IS (OFF) – +
–20 ID (OFF) + –
–30 ID, IS (ON) – –
–40
–50
–60 VDD = +15V
VSS = –15V
–70 VBIAS = +10V/–10V
0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 12. Leakage Current vs. Temperature, ±15 V Dual Supply
ADG5204
100
IS (OFF) + – ID, IS (ON) + + ID (OFF) – +
50
0
IS (OFF) – +
–50
–100
ID (OFF) + –
–150
–200
VDD = +20V
VSS = –20V
VBIAS = +15V/–15V
0 20 40
ID, IS (ON) – –
60 80 100
TEMPERATURE (°C)
120
Figure 13. Leakage Current vs. Temperature, ±20 V Dual Supply
40
IS (OFF) + –
20 ID (OFF) – +
0
IS (OFF) – +
–20
ID, IS (ON) + +
–40
–60 ID (OFF) + –
–80 ID, IS (ON) – –
–100
–120
VDD = 12V
VSS = 0V
VBIAS = 1V/10V
0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 14. Leakage Current vs. Temperature, 12 V Single Supply
50
ID (OFF) – +
IS (OFF) + –
ID, IS (ON) + +
0
–50
–100
–150
IS (OFF) – +
ID (OFF) + –
–200
–250
VDD = 36V
VSS = 0V
VBIAS = 1V/30V
0 20
ID, IS (ON) – –
40 60 80
TEMPERATURE (°C)
100
120
Figure 15. Leakage Current vs. Temperature, 36 V Single Supply
Rev. 0 | Page 11 of 20
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet ADG5204.PDF ] | |
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