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PDF FSEZ1317A Data sheet ( Hoja de datos )

Número de pieza FSEZ1317A
Descripción Primary-Side-Regulation PWM
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FSEZ1317A Hoja de datos, Descripción, Manual

January 2011
FSEZ1317A
Primary-Side-Regulation PWM with POWER MOSFET
Integrated
Features
Low Standby Power Under 30mW
High-Voltage Startup
Fewest External Component Counts
Constant-Voltage (CV) and Constant-Current (CC)
Control without Secondary-Feedback Circuitry
Green-Mode: Linearly Decreasing PWM Frequency
Fixed PWM Frequency at 50kHz with Frequency
Hopping to Solve EMI Problem
Cable Compensation in CV Mode
Peak-Current-Mode Control in CV Mode
Cycle-by-Cycle Current Limiting
VDD Over-Voltage Protection with Auto Restart
VDD Under-Voltage Lockout (UVLO)
Gate Output Maximum Voltage Clamped at 15V
Fixed Over-Temperature Protection with
Auto Restart
Available in the 7-Lead SOP Package
Description
This third-generation Primary-Side-Regulation (PSR)
and highly integrated PWM controller provides several
features to enhance the performance of low-power
flyback converters. The proprietary topology,
TRUECURRENT®, of FSEZ1317A enables precise CC
regulation and simplified circuit design for battery-
charger applications. A low-cost, smaller, and lighter
charger results, as compared to a conventional design
or a linear transformer.
To minimize standby power consumption, the
proprietary green mode provides off-time modulation to
linearly decrease PWM frequency under light-load
conditions. Green mode assists the power supply in
meeting power conservation requirements.
By using the FSEZ1317A, a charger can be
implemented with few external components and
minimized cost. A typical output CV/CC characteristic
envelope is shown in Figure 1.
Applications
Battery chargers for cellular phones, cordless
phones, PDA, digital cameras, power tools, etc.
Replaces linear transformers and RCC SMPS
Figure 1. Typical Output V-I Characteristic
Ordering Information
www.DataSheet4U.com
Part Number
FSEZ1317AMY_F116
Operating
Temperature Range
-40°C to +105°C
Package
7-Lead, Small Outline Package (SOP-7)
Packing
Method
Tape & Reel
© 2010 Fairchild Semiconductor Corporation
FSEZ1317A • Rev. 1.0.1
www.fairchildsemi.com

1 page




FSEZ1317A pdf
Electrical Characteristics
Unless otherwise specified, VDD=15V and TA=25.
Symbol
Parameter
VDD Section
VOP
VDD-ON
Continuously Operating Voltage
Turn-On Threshold Voltage
VDD-OFF Turn-Off Threshold Voltage
IDD-OP
Operating Current
IDD-GREEN Green-Mode Operating Supply Current
VDD-OVP VDD Over-Voltage-Protection Level (OVP)
VDD-OVP-HYS Hysteresis Voltage for VDD OVP
tD-VDDOVP VDD Over-Voltage-Protection Debounce Time
HV Startup Current Source Section
VHV-MIN Minimum Startup Voltage on HV Pin
IHV Supply Current Drawn from HV Pin
IHV-LC
Leakage Current after Startup
Oscillator Section
fOSC Frequency
Center Frequency
Frequency Hopping Range
fOSC-N-MIN Minimum Frequency at No-Load
fOSC-CM-MIN Minimum Frequency at CCM
fDV Frequency Variation vs. VDD Deviation
fDT Frequency Variation vs. Temperature Deviation
Voltage-Sense Section
Itc IC Bias Current
VBIAS-COMV Adaptive Bias Voltage Dominated by VCOMV
Current-Sense Section
tPD Propagation Delay to GATE Output
tMIN-N
VTH
Minimum On Time at No-Load
Threshold Voltage for Current Limit
Voltage-Error-Amplifier Section
VVR Reference Voltage
VN Green-Mode Starting Voltage on EA_V
VG Green-Mode Ending Voltage on EA_V
Current-Error-Amplifier Section
www.DataSheetV4IUR .com Reference Voltage
Cable Compensation Section
VCOMR COMR Pin for Cable Compensation
Conditions Min. Typ. Max. Units
23
15 16 17
4.5 5.0 5.5
V
V
V
2.5 5.0 mA
0.95 1.45 mA
24 V
1.5 2.0 2.5
V
50 200 300 µs
VDC=100V
HV=500V,
VDD= VDD-
OFF+1V
50 V
1.5 3.0 mA
0.96 3.00 µA
47 50 53
kHz
±3.5
370 Hz
13 kHz
VDD=10~25V,
1 2%
TA=-40°C to
105°C
15 %
RVS=20k
10 µA
1.4 V
90 200
600 725 950
0.8
ns
ns
V
fOSC-5kHz
fOSC=1kHz
2.475
2.500
2.2
0.4
2.525
V
V
V
2.475 2.500 2.525 V
0.85 V
Continued on the following page…
© 2010 Fairchild Semiconductor Corporation
FSEZ1317A • Rev. 1.0.1
5
www.fairchildsemi.com

5 Page





FSEZ1317A arduino
Cable Voltage Drop Compensation
In cellular phone charger applications, the battery is
located at the end of cable, which typically causes
several percentage of voltage drop on the battery
voltage. FSEZ1317A has a built-in cable voltage drop
compensation that provides a constant output voltage at
the end of the cable over the entire load range in CV
mode. As load increases, the voltage drop across the
cable is compensated by increasing the reference
voltage of the voltage regulation error amplifier.
Operating Current
The FSEZ1317A operating current is as small as
2.5mA, which results in higher efficiency and reduces
the VDD hold-up capacitance requirement. Once
FSEZ1317A enters “deep” green mode, the operating
current is reduced to 0.95mA, assisting the power
supply in meeting power conservation requirements.
Green-Mode Operation
The FSEZ1317A uses voltage regulation error amplifier
output (VCOMV) as an indicator of the output load and
modulates the PWM frequency as shown in Figure 26.
The switching frequency decreases as the load
decreases. In heavy load conditions, the switching
frequency is fixed at 50kHz. Once VCOMV decreases
below 2.5V, the PWM frequency linearly decreases from
50kHz. When FSEZ1317A enters deep green mode, the
PWM frequency is reduced to a minimum frequency of
370Hz, thus gaining power saving to meet international
power conservation requirements.
Figure 27. Frequency Hopping
High-Voltage Startup
Figure 28 shows the HV-startup circuit for FSEZ1317A
applications. The HV pin is connected to the line input or
bulk capacitor through a resistor, RSTART (100k
recommended). During startup status, the internal
startup circuit is enabled. Meanwhile, line input supplies
the current, ISTARTUP, to charge the hold-up capacitor,
CDD, through RSTART. When the VDD voltage reaches
VDD-ON, the internal startup circuit is disabled, blocking
ISTARTUP from flowing into the HV pin. Once the IC turns
on, CDD is the only energy source to supply the IC
consumption current before the PWM starts to switch.
Thus, CDD must be large enough to prevent VDD from
dropping down to VDD-OFF before the power can be
delivered from the auxiliary winding.
Figure 26. Switching Frequency in Green Mode
Frequency Hopping
EMI reduction is accomplished by frequency hopping,
which spreads the energy over a wider frequency range
than the bandwidth measured by the EMI test
equipment. FSEZ1317A has an internal frequency
www.DatahSohpeeptin4Ug .ccoirmcuit that changes the switching frequency
between 46kHz and 54kHz over the period shown in
Figure 27.
© 2010 Fairchild Semiconductor Corporation
FSEZ1317A • Rev. 1.0.1
11
Figure 28. HV Startup Circuit
www.fairchildsemi.com

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