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PDF AD8391 Data sheet ( Hoja de datos )
| Número de pieza | AD8391 | |
| Descripción | xDSL Line Driver | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
Ideal xDSL Line Driver for VoDSL or Low Power
Applications such as USB, PCMCIA, or PCI Based
Customer Premise Equipment (CPE)
High Output Voltage and Current Drive
340 mA Output Drive Current
Low Power Operation
3 V to 12 V Power Supply Range
1-Pin Logic Controlled Standby, Shutdown
Low Supply Current of 19 mA (Typical)
Low Distortion
–82 dBc SFDR, 12 V p-p into Differential 21 ⍀ @ 100 kHz
4.5 nV/√Hz Input Voltage Noise Density, 100 kHz
Out-of-Band SFDR = –72 dBc, 144 kHz to 500 kHz,
ZLINE = 100 ⍀, PLINE = 13.5 dBm
High Speed
40 MHz Bandwidth (–3 dB)
375 V/s Slew Rate
APPLICATIONS
VoDSL Modems
xDSL USB, PCI, PCMCIA Cards
Line Powered or Battery Backup xDSL Modems
xDSL Line Driver
3 V to 12 V with Power-Down
AD8391
PIN CONFIGURATION
8-Lead SOIC
(Thermal Coastline)
IN1 1
PWDN 2
+VS 3
VOUT1 4
؊VS
VMID
؉VS
؊؉
؉؊
AD8391
8 IN2
7 VMID
6 –VS
5 VOUT2
PRODUCT DESCRIPTION
The AD8391 consists of two parallel, low cost xDSL line drive
amplifiers capable of driving low distortion signals while running on
both 3 V to 12 V single-supply or equivalent dual-supply rails. It is
primarily intended for use in single-supply xDSL systems where low
power is essential, such as line powered and battery backup systems.
Each amplifier output drives more than 250 mA of current while
maintaining –82 dBc of SFDR at 100 kHz on 12 V, outstanding
performance for any xDSL CPE application.
The AD8391 provides a flexible power-down feature consisting of
a 1-pin digital control line. This allows biasing of the AD8391 to
full power (Logic 1), standby (Logic three-state maintains low
amplifier output impedance), and shutdown (Logic 0 places
amplifier outputs in a high impedance state). PWDN is refer-
enced to –VS.
Fabricated on ADI’s high speed XFCB process, the high bandwidth
and fast slew rate of the AD8391 keep distortion to a minimum,
while dissipating a minimum of power. The quiescent current of the
AD8391 is low: 19 mA total static current draw. The AD8391
comes in a compact 8-lead SOIC “thermal coastline” package and
operates over the temperature range –40°C to +85°C.
EMPTY BIN
25
137.5
250
FREQUENCY – kHz
Figure 1. Upstream Transit Spectrum with Empty Bin
at 45 kHz; Line Power = 12.5 dBm into 100 Ω
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
1 page  
Typical Performance Characteristics–AD8391
~VIN
VMID
CF
RG RF
VOUT
RL
0.1F
0.1F
0.1F
+
+
6.8F
6.8F
+VS
–VS
TPC 1. Single-Ended Test Circuit
0.4
VS = ؎1.5V
0.3 G = –2
CF = 0pF
RL = 10⍀
0.2
0.1
CF = 3pF
0
–0.1
–0.2
–0.3
–0.4
0
25 50 75 100 125 150 175 200 225 250
TIME – ns
TPC 4. Small Signal Step Response
0.4
VS = ؎6V
0.3 G = –2
CF = 0pF
RL = 10⍀
0.2
0.1
0 CF = 3pF
–0.1
–0.2
–0.3
–0.4
0
25 50 75 100 125 150 175 200 225 250
TIME – ns
TPC 2. Small Signal Step Response
2.0
1.5
CF = 0pF
1.0
VS = ؎1.5V
G = –2
RL = 10⍀
0.5
CF = 3pF
0
–0.5
–1.0
–1.5
–2.0
0
25 50 75 100 125 150 175 200 225 250
TIME – ns
TPC 5. Large Signal Step Response
4
VS = ؎6V
3 G = –2
CF = 0pF
RL = 10⍀
2
1 CF = 3pF
0
–1
–2
–3
–4
0 25 50 75 100 125 150 175 200 225 250
TIME – ns
TPC 3. Large Signal Step Response
0.01
0.008
0.006
0.004
0.002
0
–0.002
–0.004
–0.006
–0.008
–0.01
0
VIN = 1V p-p
VS = ؎6V
G = –2
OUTPUT ERROR
50 100 150 200 250
TIME – ns
TPC 6. 0.1% Settling Time
300
REV. A
–5–
5 Page 
AD8391
Power-Down Feature
A three-state power-down function is available via the PWDN pin.
It allows the user to select among three operating conditions: full on,
standby, or shutdown. The –VS pin is the logic reference for the
PWDN function. The full shutdown state is maintained when the
PWDN is at 0.8 V or less above –VS. In shutdown the AD8391 will
draw only 4 mA. If the PWDN pin floats, the AD8391 operates in
a standby mode with low impedance outputs and draws approxi-
mately 10 mA.
Power Supply and Decoupling
The AD8391 can be powered with a good quality (i.e., low noise)
supply anywhere in the range from 3 V to 12 V. The AD8391
can also operate on dual supplies, from ± 1.5 V to ± 6 V. In order
to optimize the ADSL upstream drive capability of +13 dBm and
maintain the best spurious free dynamic range (SFDR), the
AD8391 circuit should be powered with a well-regulated supply.
Careful attention must be paid to decoupling the power supply.
High quality capacitors with low equivalent series resistance
(ESR), such as multilayer ceramic capacitors (MLCCs), should
be used to minimize supply voltage ripple and power dissipation.
In addition, 0.1 µF MLCC decoupling capacitors should be located
no more than 1⁄8 inch away from each of the power supply pins.
A large, usually tantalum, 10 µF capacitor is required to provide
good decoupling for lower frequency signals and to supply current
for fast, large signal changes at the AD8391 outputs.
Bypassing capacitors should be laid out in such a manner to keep
return currents away from the inputs of the amplifiers. This will
minimize any voltage drops that can develop due to ground cur-
rents flowing through the ground plane. A large ground plane
will also provide a low impedance path for the return currents.
The VMID pin should also be decoupled to ground by using a 0.1 µF
ceramic capacitor. This will help prevent any high frequency
components from finding their way to the noninverting inputs of
the amplifiers.
Design Considerations
There are some unique considerations that must be taken into
account when designing with the AD8391. The VMID pin is internally
biased by two 5 kΩ resistors forming a voltage divider between
VCC and ground. These resistors will contribute approximately
6.3 nV/√Hz of input-referred (RTI) noise. This noise source is
common mode and will not contribute to the output noise when
the AD8391 is used differentially. In a single-supply system,
this is unavoidable. In a dual-supply system, VMID can be connected
directly to ground, eliminating this source of noise.
When VMID is left floating, a change in the power supply voltage
(∆V) will result in a change of one-half ∆V at the VMID pin. If
the amplifiers’ inverting inputs are ac-coupled, one-half ∆V will
appear at the output, resulting in a PSRR of –6 dB. If the inputs
are dc-coupled, ∆V × (1 + RF /RG) will appear at the outputs.
Power Dissipation
It is important to consider the total power dissipation of the
AD8391 to size the heat sink area of an application properly.
Figure 5 is a simple representation of a differential driver. With
some simplifying assumptions the total power dissipated in this
circuit can be estimated. If the output current is large compared to
the quiescent current, computing the dissipation in the output
devices and adding it to the quiescent power dissipation will give
a close approximation of the total power dissipation in the pack-
age. A factor α corrects for the slight error due to the Class A/B
operation of the output stage. The value of α depends on what
portion of the quiescent current is in the output stage and varies
from 0 to 1. For the AD8391, α ≅ 0.72.
+VS +VS
+VO
–VO
RL
–VS –VS
Figure 5. Simplified Differential Driver
Remembering that each output device only dissipates power for
half the time gives a simple integral that computes the power for
each device:
∫1
2
(VS
– VO ) ×
2 VO
RL
The total supply power can then be computed as:
( )PTOT = 4 VS ∫|VO| − ∫VO 2
×
1
RL
+ 2 α IQ VS
In this differential driver, VO is the voltage at the output of one
amplifier, so 2 VO is the voltage across RL. RL is the total imped-
ance seen by the differential driver, including any back termination.
Now, with two observations the integrals are easily evaluated.
First, the integral of VO2 is simply the square of the rms value of
VO. Second, the integral of |VO| is equal to the average rectified
value of VO, sometimes called the mean average deviation, or
MAD. It can be shown that for a DMT signal, the MAD value
is equal to 0.8 times the rms value:
PTOT
= 4 (0.8 VO
rms VS
– VO
rms2 ) ×
1
RL
+2α
IQ VS
For the AD8391 operating on a single 12 V supply and delivering
a total of 16 dBm (13 dBm to the line and 3 dBm to account for
the matching network) into 50 Ω (100 Ω reflected back through
a 1:2 transformer plus back termination), the dissipated power
is 395 mW.
REV. A
–11–
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet AD8391.PDF ] | |
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