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PDF L3030 Data sheet ( Hoja de datos )

Número de pieza L3030
Descripción SUBSCRIBER LINE INTERFACE KIT
Fabricantes STMicroelectronics 
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No Preview Available ! L3030 Hoja de datos, Descripción, Manual

L3000S
L3030
SUBSCRIBER LINE INTERFACE KIT
. PROGRAMMABLE DC FEEDING RESIS-TAN-
CE AND LIMITINGCURRENT (fourvalues avai-
lable)
. THREE OPERATING MODES :
STAND-BY, CONVERSATION, RINGING
. NORMAL/BOOSTBATTERY, DIRECT/REVER-
SE POLARITY
. SIGNALLING FUNCTION (off-hook/GND-key)
. FILTERED OFF-HOOK DETECTION IN
STAND-BY (10ms)
. QUICK OFF-HOOK DETECTION IN CONVER-
.. SATION (< 1ms) FOR LOW DIAL PULSE DE-
TECTION DISTORTION
HYBRID FUNCTION
RINGING GENERATION WITH QUASI ZERO
OUTPUT IMPEDANCE, ZERO CROSSING IN-
JECTION (no ext. relay needed) AND RING
TRIP DETECTION
. AUTOMATIC RINGING STOP WHEN OFF-
HOOK IS DETECTED
. PARALLEL AND SERIAL DIGITAL INTERFA-
CES
. TELETAXE SIGNALINJECTION (2VRMS/5VRMS)
. LOW NUMBER OF EXTERNAL COMPO-
NENTS
. GOOD REJECTION OF THE NOISE ON BAT-
TERY VOLTAGE (20dB at 10Hz and 35dB at
1kHz)
. POSSIBILITY TO WORK ALSO WITH HIGH
COMMON MODE CURRENTS
. INTEGRATED THERMAL PROTECTION WITH
THERMAL OVERLOAD INDICATION
. SURFACE MOUNT PACKAGE
(PLCC44 + PowerSO-20)
DESCRIPTION
The ST SLIC KIT (L3000S/L3030) is a set of solid
state devices designed to integratemain of the fun-
ctions needed to interface a telephone line. It con-
sists of 2 integrated devices : the L3000S line
interface circuit and the L3030 control unit.
This kit performs the main features of the BORSHT
functions :
----
Battery feed
Ringing
Signalling
Hybrid
PRELIMINARY DATA
PLCC44
FLEXIWATT15
slug-up
PowerSO20
slug-down
ORDERING NUMBERS :
L3030 (PLCC44)
L3000SX-VM (FLEXIWATT15)
L3000SX (PowerSO20 slug-up)
L3000SX-77 (PowerSO20 slug-down)
Additional functions, such as battery reversal, extra
batteryuse, line overvoltagesensing and metering-
pulse injection are also featured ; most external
characteristics,as AC and DC impedances,are pro-
grammable with external components.The SLIC in-
jects ringing in balanced mode and for that, as well
as for the operation in battery boosted, a positive
battery voltage shall be available on the subscriber
card. As the right ringing signal amplification both in
voltage and in current is provided by SLIC, the ring
signal generatorshall onlyprovide a low level signal
(0.285Vrms).
This kit is fabricatedusing a 140V Bipolar technolo-
gy for L3000Sand a 12V Bipolar I2L technologyfor
L3030.
L3030 is available PLCC44 and L3000S in both
FLEXIWATT15 and PowerSO-20 for surfacemount
application.
This kit is suitable for all the following applications:
C.O. (CentralOffice),DLC (Digital LoopCarrier) and
high range PABX (Private Automatic Branch Ex-
change).
June 1997
1/29

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L3030 pdf
L3000S BLOCK DIAGRAM
L3000S - L3030
L3030 BLOCK DIAGRAM
5/29

5 Page





L3030 arduino
L3000S - L3030
Ringing Mode
When ringingis selected(BIT2R= 1,BIT0R = 0), the
control unit L3030 presets the L3000S to operate
between – 48V (– 60V) and + 72V (+ 60V) battery.
Then,settingBIT1 =1, a low levelsignal(0.285Vrms
with frequency range 16-66Hz) applied to pin 41, is
amplified and injected in balancedmode to the line
throughL3000S with a superimposedDC voltageof
24V. The impedance to the line is given by the two
external resistors and the 24V DC polarity can only
be direct.
The first and the lastringing cycles aresynchronized
by L3030 so that ringing always starts and stops at
zero crossing. Ring trip detection is performed au-
tonomouslyby the SLIC,without anyparticularcom-
mand, using a patented system ; when handset is
lifted, SLIC suspends the ringing signal just remai-
ning inthe ringingmode. Inthiscondition,the control
unit L3030 checks that the loop is closed for a time
equal to two periods of the ringing signal ; if the clo-
sure is confirmed, a flag (BIT0T = 1) is set and the
SLIC waits the new command from the control pro-
cessor. Whereas the loop closure is not confirmed,
the ringing signalis newly appliedto theline, without
setting BIT0T.
DIGITAL INTERFACE
Functional Description
The L3030 states and functions are controlled by
central processor through five wires defining a digi-
tal interface.It is possibleto select the interfacewor-
king mode between SERIAL or PARALLEL (pin 33
tied to a voltage between 4 and 5V).
1) Serial Mode
The five wires of the digital interface have the follo-
wing functions :
- clock (DCLK), entering at pin 21
- data in/data out (DIO), exchanged at pin 20
- input/outputselect (EIA), entering at pin 18
- chip select (NCS), entering at pin 19
- change NCS from in to out (CI), entering at pin 26
(note 1)
The maximum clock frequency is 600Khz.
When EIAsignal is low data are transferredfrom the
card controller into I/O registers of the L3030 selec-
ted by NCS signal tied at low level ; then data are
latched for execution.In this phasea complete 8 bit
word is loaded into internalregister and consequen-
tly NCS signal must remain low for the correspon-
ding 8 clock pulses (DCLK). The EIA signal must
remain at low level at least for the time in whichNCS
signal remain low. The device load data in input re-
gister during the positive edge of clock signal
(DCLK) and store the contents of the register on the
positive edge of NCS signal.
When EIA signal is high data are transferred from
the L3030 selected by NCS tied to low level to the
card controller. The L3030 status is described by
five bits contained in the output register ; the NCS
signalcan remain low for fiveor lessclockpulsesde-
pending if the card controller want to read the com-
plete L3030 status or only a part of it.
Fig. 8, 9 showthe completewrite and read operation
timing. Table 1 shows the meaning of each bit of an
I/O data.
11/29

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