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Analog Devices - High PSRR Voltage Regulator

Numéro de référence ADP320
Description High PSRR Voltage Regulator
Fabricant Analog Devices 
Logo Analog Devices 





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ADP320 fiche technique
FEATURES
Bias voltage range (VBIAS): 2.5 V to 5.5 V
LDO input voltage range (VIN1/VIN2, VIN3): 1.8 V to 5.5 V
Three 200 mA low dropout voltage regulators
16-lead, 3 mm × 3 mm LFCSP
Initial accuracy: ±1%
Stable with 1 μF ceramic output capacitors
No noise bypass capacitor required
3 independent logic controlled enables
Over current and thermal protection
Key specifications
High PSRR
76 dB PSRR up to 1 kHz
70 dB PSRR 10 kHz
60 dB PSRR at 100 kHz
40 dB PSRR at 1 MHz
Low output noise
29 μV rms typical output noise at VOUT = 1.2 V
55 μV rms typical output noise at VOUT = 2.8 V
Excellent transient response
Low dropout voltage: 110 mV @ 200 mA load
85 μA typical ground current at no load, all LDOs enabled
100 μs fast turn-on circuit
Guaranteed 200 mA output current per regulator
−40°C to +125°C junction temperature
APPLICATIONS
Mobile phones
Digital cameras and audio devices
Portable and battery-powered equipment
Portable medical devices
Post dc-to-dc regulation
GENERAL DESCRIPTION
The ADP320 200 mA triple output LDO combines high PSRR, low
noise, low quiescent current, and low dropout voltage in a voltage
regulator ideally suited for wireless applications with demanding
performance and board space requirements.
The low quiescent current, low dropout voltage, and wide input
voltage range of the ADP320 triple LDO extend the battery life of
portable devices. The ADP320 triple LDO maintains power supply
rejection greater than 60 dB for frequencies as high as 100 kHz
www.DwhatilaeSohpeeerta4tUin.gcowmith a low headroom voltage. The ADP320 triple
Triple, 200 mA, Low Noise,
High PSRR Voltage Regulator
ADP320
TYPICAL APPLICATION CIRCUITS
2.5V TO VBIAS
5.5V
+
1µF
ADP320 VBIAS
1.8V TO VIN1/VIN2
5.5V
+
1µF ON
EN1
OFF
LDO 1
EN LD1
VBIAS
1.8V TO VIN3
5.5V
ON
EN2
OFF
+
1µF ON
EN3
OFF
LDO 2
EN LD2
VBIAS
LDO 3
EN LD3
GND
VOUT1
+
1µF
VOUT2
+
1µF
VOUT3
+
1µF
Figure 1. Typical Application Circuit
LDO offers much lower noise performance than competing LDOs
without the need for a noise bypass capacitor.
The ADP320 triple LDO is available in a miniature 16-lead
3 mm × 3 mm LFCSP package and is stable with tiny 1 μF ±30%
ceramic output capacitors, resulting in the smallest possible board
area for a wide variety of portable power needs.
The ADP320 triple LDO is available in output voltage combin-
ations ranging from 0.8 V to 3.3 V and offers over current and
thermal protection to prevent damage in adverse conditions.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.

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