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Analog Devices - 750 MHz to 1150 MHz Quadrature Demodulator

Numéro de référence ADRF6801
Description 750 MHz to 1150 MHz Quadrature Demodulator
Fabricant Analog Devices 
Logo Analog Devices 





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ADRF6801 fiche technique
750 MHz to 1150 MHz Quadrature
Demodulator with Fractional-N PLL and VCO
ADRF6801
FEATURES
IQ demodulator with integrated fractional-N PLL
LO frequency range: 750 MHz to 1150 MHz
Input P1dB: 12.5 dBm
Input IP3: 25 dBm
Noise figure (DSB): 14.3 dB
Voltage conversion gain: 5.1 dB
Quadrature demodulation accuracy
Phase accuracy: 0.3°
Amplitude accuracy: 0.05 dB
Baseband demodulation: 275 MHz, 3 dB bandwidth
SPI serial interface for PLL programming
40-lead, 6 mm × 6 mm LFCSP
APPLICATIONS
QAM/QPSK RF/IF demodulators
Cellular W-CDMA/CDMA/CDMA2000
Microwave point-to-(multi)point radios
Broadband wireless and WiMAX
GENERAL DESCRIPTION
The ADRF6801 is a high dynamic range IQ demodulator with
integrated PLL and VCO. The fractional-N PLL/synthesizer
generates a frequency in the range of 3.0 GHz to 4.6 GHz. A
divide-by-4 quadrature divider divides the output frequency of
the VCO down to the required local oscillator (LO) frequency
to drive the mixers in quadrature. Additionally, an output buffer
can be enabled that generates an fVCO/2 signal for external use.
The PLL reference input is supported from 10 MHz to 160 MHz.
The phase detector output controls a charge pump whose output
is integrated in an off-chip loop filter. The loop filter output is
then applied to an integrated VCO.
The IQ demodulator mixes the differential RF input with the
complex LO derived from the quadrature divider. The differential
I and Q output paths have excellent quadrature accuracy and
can handle baseband signaling or complex IF up to 120 MHz.
The ADRF6801 is fabricated using an advanced silicon-germanium
BiCMOS process. It is available in a 40-lead, exposed-paddle,
RoHS-compliant, 6 mm × 6 mm LFCSP package. Performance is
specified over the −40°C to +85°C temperature range.
LON 37
LOP 38
GND 11
DATA 12
CLK 13
LE 14
GND 15
REFIN 6
GND 7
MUXOUT 8
FUNCTIONAL BLOCK DIAGRAM
GND
35
VCCLO VCCLO
34 17
LOSEL
36
BUFFER
CTRL
BUFFER
IBBP
33
ADRF6801
SPI
INTERFACE
×2
MUX
÷2
÷4
FRACTION
REG
MODULUS
INTEGER
REG
THIRD-ORDER
FRACTIONAL
INTERPOLATOR
N COUNTER
BUFFER
PRESCALER
÷2
MUX
DIVIDER
÷1
OR
÷2
VCO
CORE
QUAD
÷2
TEMP
SENSOR
3.3V LDO
+
PHASE
FREQUENCY
DETECTOR
CHARGE PUMP
250µA,
500µA (DEFAULT),
750µA,
1000µA
2.5V LDO
VCO LDO
IBBN GND
32 31
30 GND
29 VCCBB
28 GND
27 VCCRF
26 RFIN
25 GNDRF
24 GND
23 GND
22 VCCBB
21 GND
1 2 10
VCC1 DECL3 VCC2
16
GND
34
5
CPOUT GND RSET
Figure 1.
9
DECL2
39
VTUNE
40
DECL1
18 19 20
QBBP QBBN GND
www.DataSheet4U.com
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.

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