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PDF HY5S7B2ALFP-6 Data sheet ( Hoja de datos )
| Número de pieza | HY5S7B2ALFP-6 | |
| Descripción | 512M (16Mx32bit) Mobile SDRAM | |
| Fabricantes | Hynix Semiconductor | |
| Logotipo |  |
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512MBit MOBILE SDR SDRAMs based on 4M x 4Bank x32 I/O
Specification of
512M (16Mx32bit) Mobile SDRAM
Memory Cell Array
- Organized as 4banks of 4,194,304 x32
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev 1.2 / Nov. 2008
1
1 page  
11
512Mbit (16Mx32bit) Mobile SDR Memory
HY5S7B2ALF(P) Series
FEATURES
● Standard SDRAM Protocol
● Clock Synchronization Operation
- All the commands registered on positive edge of basic input clock (CLK)
● MULTIBANK OPERATION - Internal 4bank operation
- During burst Read or Write operation, burst Read or Write for a different bank is performed.
- During burst Read or Write operation, a different bank is activated and burst Read or Write
for that bank is performed
- During auto precharge burst Read or Write, burst Read or Write for a different bank is performed
● Power Supply Voltage : VDD = 1.8V, VDDQ = 1.8V
● LVCMOS compatible I/O Interface
● Low Voltage interface to reduce I/O power
● Programmable burst length: 1, 2, 4, 8 or full page
● Programmable Burst Type : sequential or interleaved
● Programmable CAS latency of 3 or 2
● Programmable Drive Strength
● Low Power Features
- Programmable PASR(Partial Array Self Refresh)
- Auto TCSR (Temperature Compensated Self Refresh)
- Programmable DS (Drive Strength)
- Deep Power Down Mode
● -25oC ~ 85oC Operation Temperature
- Extended Temp. : -25oC ~ 85oC
● Package Type : 90ball, 0.8mm pitch FBGA (Lead Free, Lead), 8 x 13 [mm2], t=1.0mm max
HY5S7B2ALFP : Lead Free
512M SDRAM ORDERING INFORMATION
Part Number
HY5S7B2ALFP-6
HY5S7B2ALFP-H
HY5S7B2ALFP-S
Clock Frequency
CAS
Latency
Organization
Interface
90Ball
FBGA
166MHz
3
133MHz
3 4banks x 4Mb x 32 LVCMOS Lead Free
105MHz
3
Rev 1.2 / Nov. 2008
5
5 Page 
11
512Mbit (16Mx32bit) Mobile SDR Memory
HY5S7B2ALF(P) Series
DC CHARACTERISTICS III - Low Power (IDD6)
Temp.
( oC)
45
85
4 Banks
250
500
Memory Array
2 Banks
220
400
1 Bank
205
350
Unit
uA
uA
1. VDD / VDDQ = 1.8V
2. Related numerical values in this 45oC are examples for reference sample value only.
3. With a on-chip temperature sensor of Mobile memory, auto temperature compensated self refresh will automatically
adjust the interval of self-refresh operation according to ambient temperature variations.
Rev 1.2 / Nov. 2008
11
11 Page | ||
| Páginas | Total 53 Páginas | |
| PDF Descargar | [ Datasheet HY5S7B2ALFP-6.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| HY5S7B2ALFP-6 | 512M (16Mx32bit) Mobile SDRAM | Hynix Semiconductor |
| HY5S7B2ALFP-H | 512M (16Mx32bit) Mobile SDRAM | Hynix Semiconductor |
| HY5S7B2ALFP-S | 512M (16Mx32bit) Mobile SDRAM | Hynix Semiconductor |
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