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PDF TEA1752T Data sheet ( Hoja de datos )

Número de pieza TEA1752T
Descripción GreenChip III SMPS control IC
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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TEA1752T; TEA1752LT
GreenChip III SMPS control IC
Rev. 02 — 24 June 2010
Product data sheet
1. General description
www.DataSheet4U.com
The GreenChip III is the third generation of green Switched Mode Power Supply (SMPS)
controller ICs. The TEA1752T and TEA1752LT combine a controller for Power Factor
Correction (PFC) and a flyback controller. The high level of integration facilitates the
design of a cost-effective power supply using a minimum number of external components.
The special built-in green functions provide high efficiency at all power levels. This applies
to quasi-resonant operation at high power levels, quasi-resonant operation with valley
skipping and reduced frequency operation at lower power levels. At low power levels, the
PFC switches off to maintain high efficiency.
During low power conditions, the flyback controller switches to frequency reduction mode
and limits the peak current to an adjustable minimum value. This will ensure high
efficiency at low power and good standby power performance while minimizing audible
noise from the transformer.
The TEA1752(L)T is a MultiChip Module (MCM), containing two chips. The proprietary
high voltage BCD800 process which enables direct start-up from the rectified universal
mains voltage in an effective and green way and a low voltage Silicon-On Insulator (SOI)
which provides accurate, high speed protection functions and control.
The TEA1752(L)T enables highly efficient and reliable supplies with power requirements
of up to 250 W to be designed easily and with a minimum number of external
components.
2. Features and benefits
2.1 Distinctive features
„ Integrated PFC and flyback controller
„ Universal mains supply operation (70 V (AC) to 276 V (AC))
„ Dual boost PFC with accurate maximum output voltage (NXP Semiconductors
patented, US patent number: US7575280)
„ High level of integration, resulting in a very low external component count and a
cost-effective design
„ Adjustable PFC switch-off delay
2.2 Green features
„ On-chip start-up current source

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TEA1752T pdf
NXP Semiconductors
TEA1752T; TEA1752LT
GreenChip III SMPS control IC
6. Pinning information
6.1 Pinning
www.DataSheet4U.com
VCC 1
GND 2
FBCTRL 3
FBAUX 4
LATCH 5
PFCCOMP 6
VINSENSE 7
PFCAUX 8
16 HV
15 HVS
14 PFCTIMER
13 FBDRIVER
TEA1752(L)T
12 PFCDRIVER
11 PFCSENSE
10 FBSENSE
9 VOSENSE
014aaa741
Fig 2. Pin configuration: TEA1752(L)T (SOT109-1)
6.2 Pin description
Table 2.
Symbol
VCC
GND
FBCTRL
FBAUX
Pin description
Pin
1
2
3
4
LATCH
PFCCOMP
VINSENSE
PFCAUX
5
6
7
8
VOSENSE
FBSENSE
PFCSENSE
PFCDRIVER
FBDRIVER
PFCTIMER
HVS
HV
9
10
11
12
13
14
15
16
Description
supply voltage
ground
control input for flyback
input from auxiliary winding for demagnetization timing and
overvoltage protection for flyback
general purpose protection input
frequency compensation pin for PFC
sense input for mains voltage
input from auxiliary winding for demagnetization timing for PFC
and valley sensing of the PFC part
sense input for PFC output voltage
programmable current sense input for flyback
programmable current sense input for PFC
gate driver output for PFC
gate driver output for flyback
delay timer pin for PFC on/off control
high voltage safety spacer, not connected
high voltage start-up and valley sensing of flyback part
TEA1752T_LT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 24 June 2010
© NXP B.V. 2010. All rights reserved.
5 of 34

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TEA1752T arduino
NXP Semiconductors
TEA1752T; TEA1752LT
GreenChip III SMPS control IC
S1
RSS1
CSS1
RSENSE1
Istart(soft)PFC 60 μA
SOFT START
SOFT STOP
CONTROL
11
PFCSENSE
OCP
0.5 V
www.DataSheet4U.com
Fig 5. Soft start-up of PFC
014aaa756
7.2.6 Low power mode
When the output power of the flyback converter (see Section 7.3) is low, the flyback
converter switches to frequency reduction mode. When the internal switching frequency
limit of the flyback drops below 48 kHz (typical), the power factor correction circuit is
switched off to maintain high efficiency. The switch-off can be delayed by connecting a
capacitor to the PFCTIMER pin (see Section 7.2.7).
During low power mode operation the PFCCOMP pin is clamped to a minimum voltage of
3.5 V (typical) and a maximum voltage of 3.7 V (typical). The lower clamp voltage limits
the maximum power delivered when the PFC is switched on again. The upper clamp
voltage ensures the PFC can return to its normal regulation point in a limited amount of
time when returning from low power mode.
The power factor correction circuit restores normal operation when the internal switching
frequency limit of the flyback converter rises above 86 kHz (typical).
7.2.7 PFC off delay (pin PFCTIMER)
When the internal switching frequency limit of the flyback controller drops below
48 kHz (typical), the PFC is switched off. To prevent the PFC from switching off due to a
fast changing load at the flyback output, the PFC switch-off can be delayed by connecting
a capacitor to the PFCTIMER pin.
When the flyback controller detects a low power, it enters frequency reduction mode and
the IC outputs a 10 μA (typical) current to the PFCTIMER pin. When the voltage on the
PFCTIMER pin reaches 3.6 V (typical), the PFC is switched off by performing a soft stop.
When the flyback controller part leaves the frequency reduction mode, a switch
discharges the PFCTIMER pin capacitor. When the voltage on the PCTIMER pin drops
below 1.27 V (typical), the PFC is switched on (see Figure 6).
TEA1752T_LT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 24 June 2010
© NXP B.V. 2010. All rights reserved.
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