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PDF LK520D3LZ89 Data sheet ( Hoja de datos )
| Número de pieza | LK520D3LZ89 | |
| Descripción | LCD Module | |
| Fabricantes | Sharp | |
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Technical Document
LCD Specification
LCD Group
LK520D3LZ89 LCD Module
Product Specification
April 2008
1920 × 1080 Full-HD, Normally Black,
LCD Module featuring symmetrical 176° viewing
angle; 450 nits brightness with 1500:1 contrast.
Full Specifications Listing.
1 page  
LD- K20311-2
4. Input Terminals
4.1. TFT panel driving
CN1 (Interface signals and +12V DC power supply) (Shown in Fig.1)
Using connector
: FI-RE51S-HF (Japan Aviation Electronics Ind. , Ltd.)
Mating connector
: FI-RE51HL, FI-RE51CL (Japan Aviation Electronics Ind. , Ltd.)
Mating LVDS transmitter
: THC63LVD1023 or equivalent device
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Symbol
GND
Reserved
Reserved
Reserved
Reserved
Reserved
SELLVDS
Reserved
O/S set
FRAME
GND
AIN0-
AIN0+
AIN1-
AIN1+
AIN2-
AIN2+
GND
ACK-
ACK+
GND
AIN3-
AIN3+
AIN4-
AIN4+
GND
GND
BIN0-
BIN0+
BIN1-
BIN1+
BIN2-
BIN2+
GND
BCK-
BCK+
GND
BIN3-
BIN3+
BIN4-
BIN4+
GND
GND
GND
Function
It is required to set non-connection(OPEN)
It is required to set non-connection(OPEN)
It is required to set non-connection(OPEN)
It is required to set non-connection(OPEN)
It is required to set non-connection(OPEN)
Select LVDS data order [Note1,2]
It is required to set non-connection(OPEN)
O/S operation setting H:O/S_ON, L:O/S_OFF [Note 3]
Frame frequency setting 1:60Hz 0:50Hz
Aport (-)LVDS CH0 differential data input
Aport (+)LVDS CH0 differential data input
Aport (-)LVDS CH1 differential data input
Aport (+)LVDS CH1 differential data input
Aport (-)LVDS CH2 differential data input
Aport (+)LVDS CH2 differential data input
Aport LVDS Clock signal(-)
Aport LVDS Clock signal(+)
Aport (-)LVDS CH3 differential data input
Aport (+)LVDS CH3 differential data input
Aport (-)LVDS CH4 differential data input
Aport (+)LVDS CH4 differential data input
Bport (-)LVDS CH0 differential data input
Bport (+)LVDS CH0 differential data input
Bport (-)LVDS CH1 differential data input
Bport (+)LVDS CH1 differential data input
Bport (-)LVDS CH2 differential data input
Bport (+)LVDS CH2 differential data input
Bport LVDS Clock signal(-)
Bport LVDS Clock signal(+)
Bport (-)LVDS CH3 differential data input
Bport (+)LVDS CH3 differential data input
Bport (-)LVDS CH4 differential data input
Bport (+)LVDS CH4 differential data input
Remark
Pull up 3.3V
Pull up 3.3V
Pull up 3.3V
Pull down : (GND)
Pull down : (GND)
Pull down : (GND)
Pull down : (GND)
Pull up 3.3V
Pull down :GND
5 Page 
[Note 2] Brightness Control selection
Pin No.14 is used for the selection of dimming control for VBRT pin (Pin No.13).
Input voltage
0V
3.3V
VBRT
Pulse dimming
Analog dimming
LD- K20311-8
[Note 3]Brightness Control
1. Analog Dimming
Brightness control is regulated by analog input voltage (0V to 3.3V).
Input voltage [VBRT]
[Reference]
Brightness ratio［%］
MIN
0V
20
TYP
<->
<->
MAX
3.3V
100
Ta=25℃
Function
0V: Dark - 3.3V: Bright
[Note] PWM frequency : 275±10Hz
[Note]There is a case that lamp mura may happen, depending on ambient temperature and dimming.
Dimming level should be set according to your evaluation of actual display performance.
(Minimum input voltage 1.5V at below 15℃)
2.Pulse Dimming
Pin No.13 is used for the control of the PWM duty with input pulse from 150Hz to 350Hz.
Input PWM waveform
High voltage
Low voltage
Ton
ON OFF
T
ON
Duty＝TON/T
Pulse signal
DUTY(TON/T)
Dimming level
(Brightness ratio)
[Hz]
[%]
[%]
MIN
150
35
20
TYP
275
<->
<->
MAX
350
100
100
Remark
Ta=25℃
Ta=25℃
Pulse signal=275Hz
[Note]There is a case that lamp mura may happen, depending on ambient temperature,
in dimming. Minimum dimming level should be set according to your evaluation of
actual display performance. (Minimum duty 60％ at below 15℃)
[Note]In case of using Pulse Dimming, be careful so that the VBRT signal (Pin 13) doesn’t have glitch.
11 Page | ||
| Páginas | Total 27 Páginas | |
| PDF Descargar | [ Datasheet LK520D3LZ89.PDF ] | |
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