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PDF FX929A Data sheet ( Hoja de datos )

Número de pieza FX929A
Descripción 4-Level FSK Modem Data Pump
Fabricantes CML Microcircuits 
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No Preview Available ! FX929A Hoja de datos, Descripción, Manual

CML Semiconductor Products
www.DataSheet4U.com
FX929A4-Level FSK Modem Data Pump
1.0 Features
D/929A/4 June 1996
Advance Information
4-Level FSK Modulation
Half Duplex, 4800 to 19.2k bits/sec
Full Packet Data Framing
RD-LAP Compatible*
Flexible Operating Modes
Host Bus Interface
Low Power 3.3V to 5V Operation
24-Pin Small Form Package Option
Radio Data-Link Access Procedure (RD-LAP) is a data communications air interface protocol developed by Motorola Inc.
1.1 Brief Description
The FX929A is a CMOS integrated circuit that contains all of the baseband signal processing and Medium
Access Control (MAC) protocol functions required for a high performance 4-level FSK Wireless Packet Data
Modem. It interfaces with the modem host processor and the radio modulation/demodulation circuits to deliver
reliable two-way transfer of the application data over the wireless link.
The FX929A assembles application data received from the processor, adds forward error correction (FEC) and
error detection (CRC) information and interleaves the result for burst-error protection. After adding symbol and
frame sync codewords, it converts the packet into filtered 4-level analogue signals for modulating the radio
transmitter.
In receive mode, the FX929A performs the reverse function using the analogue signals from the receiver
discriminator. After error correction and removal of the packet overhead, the recovered application data is
supplied to the processor. Any residual uncorrected errors in the data will be flagged. A readout of the SNR
value during receipt of a packet is also provided.
The FX929A uses data block sizes and FEC/CRC algorithms compatible with the RD-LAP over-air standard.
The format used is suitable for other private applications which require the high-speed transfer of data over
narrow-band wireless links. The device is programmable to operate at most standard bit-rates from a wide
choice of Xtal/clock frequencies.
© 1996 Consumer Microcircuits Limited

1 page




FX929A pdf
4-Level FSK Modem Data Pump
FX929A
www.DataSheet4U.com
Package
P4/D2/D5
Signal
Description
Pin No.
20
21
Name
TXOP
VBIAS
22 RXIN
23 RXFB
24 VDD
Type
O/P
O/P
I/P
O/P
Power
The Tx signal output from the modem.
A bias line for the internal circuitry, held at
½ VDD. This pin must be decoupled to VSS by a
capacitor mounted close to the device pins.
The input to the Rx input amplifier.
The output of the Rx input amplifier and the input
to the Rx RRC filter.
The positive supply rail. Levels and voltages are
dependent upon this supply. This pin should be
decoupled to VSS by a capacitor.
Notes: I/P = Input
O/P = Output
BI = Bidirectional
Internal protection diodes are connected from each signal pin to VDD and VSS.
© 1996 Consumer Microcircuits Limited
5
D/929A/4

5 Page





FX929A arduino
4-Level FSK Modem Data Pump
FX929A
Thus, to transmit a block, the controlling µC has only to load the - unformatted - 'raw' binwawrywd.DaatataSinhteoett4hUe.com
modem's Data Block Buffer then instruct the modem to format and transmit that data. The modem will then
calculate and add the CRC bits as required, encode the result as 4-level symbols (with Forward Error
Correction coding) and interleave the symbols before transmission.
In receive mode, the modem can be instructed to assemble a block's worth of received symbols, de-interleave
the symbols, translate them to binary - using the FEC coding to correct as many errors as possible - and check
the resulting CRC before placing the received binary data into the Data Block Buffer for the µC to read.
The modem can also transmit and receive un-formatted data using the T4S, T24S and R4S tasks described in
sections 1.5.3 and 1.5.5.2. These are normally used for the transmission of Symbol and Frame Synchronisation
sequences. They may also be used for the transmission and reception of special test patterns or even for
special data formats - although in this case care should be taken to ensure that the transmitted signal contains
enough level and timing information for the receiving modem's level and clock extraction circuits to function
correctly (see section 1.6.3).
1.5.3 Binary to Symbol Translation
Although the over-air signal, and hence the signals at the modem TXOP and RXIN pins, consists of 4-level
symbols, the raw data passing between the modem and the µC is in binary form. Translation between binary
data and the 4-level symbols is done in one of two ways, depending on the task being performed.
Direct: the simplest form, which converts between 2 binary bits and a single symbol, such as the 'S' Channel
Status symbol.
symbol
+3
+1
-1
-3
ms bit
1
1
0
0
ls bit
1
0
0
1
This is expanded so that an 8-bit byte translates to four symbols for the T4S, T24S and R4S tasks described in
Section 1.5.5.2.
Bits:
Symbols:
msb
76
a
sent first
54
b
32
c
lsb
10
d
sent last
With FEC: This is more complicated, but essentially translates groups of 3 binary bits to pairs of 4-level
symbols using a Forward Error Correcting coding scheme for the block oriented tasks THB, TIB, TLB, TSID,
RHB, RILB and RSID described in Section 1.5.5.2.
© 1996 Consumer Microcircuits Limited
11
D/929A/4

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