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PDF LA72715V Data sheet ( Hoja de datos )
| Número de pieza | LA72715V | |
| Descripción | JPN MTS | |
| Fabricantes | Sanyo Semicon Device | |
| Logotipo |  |
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Ordering number : ENA0982A
LA72715V
LA72715VA
Monolithic Linear IC
JPN MTS (Multi Channel
Television Sound) Decoder IC
Overview
JPN MTS (Multi Channel Television Sound) Decoder IC
Features
• With SIF circuit, alignment-free* STEREO channel separation.
* In base band signal input mode, separation is adjusted by input level.
• Three I2C slave-addresses are prepared.
• The maximum output level is as large as 4.2dBV.
(Frequency = 1kHz, distortion = less than 3%, VCC = 5V, TYP)
• The external clock is unnecessary.
• A couple of external input terminal is prepared.
Functions
• Stereo & Bilingual demodulation.
• Stereo & Bilingual detection.
• Just clock out.
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
Conditions
Maximum power supply voltage
Allowable power dissipation
VCCH max
Pd max
Ta ≤ 80°C, Mounted on a specified board*
Operating temperature
Topr
Storage temperature
Tstg
* Mounted on a specified board: 114.3mm × 76.1mm × 1.6mm glass epoxy board
Ratings
7.0
203
-20 to +80
-55 to +150
Unit
V
mW
°C
°C
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer's products or
equipment.
www.DataSheet.in
N1908 MS / D2607 TI IM 20070928-S00006, S00003 No.A0982-1/12
1 page  
LA72715V, 72715VA
Block Diagram and Application Circuit Example
The value of (1*), (2*), and (3*) affects sensitivity for signal detection. It must be adjusted depending on the
circumstances by the user.
(1*): Recommended constant value 0.0033µF + 470kΩ (values when tested)
(2*): Recommended matching resistor value R1=1kΩ, R2=1kΩ
Recommended BPF Murata SFSRA4M50DF00-B0
(3*): Recommended constant value 4.7µF to 10kΩ
The ceramic capacitor may be used for the electrolytic capacitor.
www.DataSheet.in
No.A0982-5/12
5 Page 
LA72715V, 72715VA
Mode Select (pin & I2C setting)
Broadcast
signal
Bilingual
MUTE PIN
setting
8pin
L or OPEN
I2C OUTPUT MODE
D5 D4 D3 D2 D1 LCH (18pin) RCH (17pin)
00000
MAIN
SUB
MODE
BOTH
L or OPEN 0 0 0 0 1
L or OPEN 0 0 0 1 0
L or OPEN 0 0 1 * *
* *1***
MAIN
SUB
MAIN
MUTE
MAIN
SUB
MAIN
MUTE
MAIN
SUB
MONO
MUTE
H
*****
MUTE
MUTE
MUTE
L or OPEN 1 0 * * *
EXT L
EXT R
EXT
STEREO L or OPEN 0 0 0 * *
L or OPEN 0 0 1 * *
* *1***
L
L+R
MUTE
R
L+R
MUTE
STEREO
MONO
MUTE
MONO
H *****
L or OPEN 1 0 * * *
L or OPEN 0 0 * * *
* *1***
MUTE
EXT L
L+R
MUTE
MUTE
EXT R
L+R
MUTE
MUTE
EXT
MONO
MUTE
H
*****
MUTE
MUTE
MUTE
L or OPEN 1 0 * * *
EXT L
EXT R
16pin : Slave address select. 0V to 1.5V : A0H, OPEN : 80H, 3.0V to VCC : 84H
EXT
Serial Data Specification (I2C bus communication)
MSB
D8
TEST
D7
SIF or
BASE BAND
D6
JUST
CLK
Data bit
D5
EXT SOURCE
SELECT
D4
NORMAL OUT
MUTE
D3
Forced
MONO
0 : OFF
1 : ON
0 : SIF
1 : BASE
BAND
0 : OFF
1 : ON
Note : Underline shows default setting
0 : OFF(TV)
1 : EXT
0 : OFF
1 : ON
0 : OFF
1 : ON
READ
MODE OUT
D8 D7
01
01
01
01
01
01
01
10
10
10
10
10
00
00
00
00
MODE
I/O
20pin
3V
1V
2V
LSB
D2 D1
Bilingual mode select
00:BILINGUAL
01 : MAIN
10 : SUB
11 : Unusable
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No.A0982-11/12
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet LA72715V.PDF ] | |
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