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PDF NCV70522 Data sheet ( Hoja de datos )

Número de pieza NCV70522
Descripción Micro-Stepping Motor Driver
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AMIS-30522, NCV70522
Micro-Stepping Motor Driver
Introduction
The AMIS30522/NCV70522 is a microstepping stepper motor
driver for bipolar stepper motors. The chip is connected through I/O
pins and a SPI interface with an external microcontroller. The
AMIS30522/NCV70522 contains a currenttranslation table. It takes
the next microstep depending on the clock signal on the “NXT” input
pin and the status of the “DIR” (= direction) register or input pin. The
chip provides a socalled “Speed and Load Angle” output. This allows
the creation of stall detection algorithms and control loops based on
loadangle to adjust torque and speed. It is using a proprietary PWM
algorithm for reliable current control.
The AMIS30522/NCV70522 is implemented in I2T100
technology, enabling both high voltage analog circuitry and digital
functionality on the same chip. The chip is fully compatible with the
automotive voltage requirements.
The 522 is ideally suited for general purpose stepper motor
applications in the automotive, industrial, medical and marine
environment. The AMIS30522 is intended for use in industrial
applications. The NCV70522 version is qualified for use in
automotive applications.
Features
Dual HBridge for 2 Phase Stepper Motors
Programmable PeakCurrent up to 1.2 A Continuous (1.5 A Short
Time), Using a 5Bit Current DAC
OnChip Current Translator
SPI Interface
Speed and LoadAngle Output
7 Step Modes from FullStep up to 32 MicroSteps
Fully Integrated CurrentSense
PWM Current Control with Automatic Selection of Fast and Slow
Decay
Low EMC PWM with Selectable Voltage Slopes
Active Flyback Diodes
Full Output Protection and Diagnosis
Thermal Warning and Shutdown
Digital IO’s Compatible with 5 V and 3.3 V Microcontrollers
Integrated 5 V Voltage Regulator to Supply an External
Microcontroller
Integrated Reset Function to Reset External Microcontroller
Integrated Watchdog Function
NCV Prefix for Automotive and Other Applications Requiring Site
and Control Changes
These are PbFree Devices*
http://onsemi.com
PINOUT
32 31 30 29 28 27 26 25
GND 1
DI 2
CLK 3
NXT 4
DIR 5
ERR 6
SLA 7
8
AMIS30522/
NCV70522
24 GND
23 GND
22 MOTXN
21 MOTXN
20 MOTYN
19 MOTYN
18 GND
17 GND
9 10 11 12 13 14 15 16
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 27 of this data sheet.
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2009
December, 2009 Rev. 0
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1
Publication Order Number:
AMIS30522/D

1 page




NCV70522 pdf
AMIS30522, NCV70522
PACKAGE THERMAL CHARACTERISTICS
The 522 is available in a NQFP32 package. For cooling
optimizations, the NQFP has an exposed thermal pad which
has to be soldered to the PCB ground plane. The ground
plane needs thermal vias to conduct the heat to the bottom
layer. Figure 3 gives an example for good power distribution
solutions.
For precise thermal cooling calculations the major
thermal resistances of the device are given. The thermal
media to which the power of the devices has to be given are:
Static environmental air (via the case)
PCB board copper area (via the exposed pad)
The thermal resistances are presented in Table 5: DC
Parameters.
The major thermal resistances of the device are the Rth
from the junctiontoambient (Rthja) and the overall Rth
from the junctiontoexposed pad (Rthjp). In the table
below one can find the values for the Rthja and Rthjp,
simulated according to JESD51:
The Rthja for 2S2P is simulated conform JEDEC JESD51
as follows:
A 4layer printed circuit board with inner power planes
and outer (top and bottom) signal layers is used
Board thickness is 1.46 mm (FR4 PCB material)
The 2 signal layers: 70 mm thick copper with an area of
5500 mm2 copper and 20% conductivity
The 2 power internal planes: 36 mm thick copper with
an area of 5500 mm2 copper and 90% conductivity
The Rthja for 1S0P is simulated conform JEDEC JESD51
as follows:
A 1layer printed circuit board with only 1 layer
Board thickness is 1.46 mm (FR4 PCB material)
The layer has a thickness of 70 mm copper with an area
of 5500 mm2 copper and 20% conductivity
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎNÎÎÎÎQFPÎÎÎÎ32ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Figure 3. Example of NQFP32 PCB Ground Plane Layout in Top View (Preferred Layout at Top and Bottom)
ELECTRICAL SPECIFICATION
Recommended Operation Conditions
Operating ranges define the limits for functional
operation and parametric characteristics of the device. Note
that the functionality of the chip outside these operating
Table 4. OPERATING RANGES
Symbol
Parameter
VBB Analog DC supply
VDD Logic supply output voltage
TJ Junction temperature
5. No more than 100 cumulative hours in life time above Ttw
ranges is not guaranteed. Operating outside the
recommended operating ranges for extended periods of time
may affect device reliability.
Min Max
+6 +30
4.75 5.25
40 +172 (Note 5)
Unit
V
V
°C
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NCV70522 arduino
AMIS30522, NCV70522
FUNCTIONAL DESCRIPTION
HBridge Drivers
A full Hbridge is integrated for each of the two stator
windings. Each Hbridge consists of two lowside and two
highside Ntype MOSFET switches. Writing logic ‘0’ in
bit <MOTEN> disables all drivers (HighImpedance).
Writing logic ‘1’ in this bit enables both bridges and current
can flow in the motor stator windings.
In order to avoid large currents through the Hbridge
switches, it is guaranteed that the topand bottom switches
of the same halfbridge are never conductive
simultaneously (interlock delay).
A twostage protection against shorts on motor lines is
implemented. In a first stage, the current in the driver is
limited. Secondly, when excessive voltage is sensed across
the transistor, the transistor is switchedoff.
In order to reduce the radiated/conducted emission,
voltage slope control is implemented in the output switches.
The output slope is defined by the gatedrain capacitance of
output transistor and the (limited) current that drives the
gate. There are two trimming bits for slope control (See
Table 12 SPI Control Parameter Overview EMC[1:0]).
The power transistors are equipped with socalled “active
diodes”: when a current is forced through the transistor
switch in the reverse direction, i.e. from source to drain, then
the transistor is switched on. This ensures that most of the
current flows through the channel of the transistor instead of
through the inherent parasitic drainbulk diode of the
transistor.
Depending on the desired current range and the
microstep position at hand, the RDS(on) of the lowside
transistors will be adapted such that excellent currentsense
accuracy is maintained. The RDS(on) of the highside
transistors remain unchanged, see also the DCparameter
table for more details.
PWM Current Control
A PWM comparator compares continuously the actual
winding current with the requested current and feeds back
the information to a digital regulation loop. This loop then
generates a PWM signal, which turns on/off the Hbridge
switches. The switching points of the PWM dutycycle are
synchronized to the onchip PWM clock.
The frequency of the PWM controller can be doubled to
reduce the overall currentripple with a factor of two.
To further reduce the emission, an artificial jitter can be
added to the PWM frequency. (see Table 12, SPI Control
Register 1). The PWM frequency will not vary with changes
in the supply voltage. Also variations in motorspeed or
loadconditions of the motor have no effect. There are no
external components required to adjust the PWM frequency.
Automatic Forward & SlowFast Decay
The PWM generation is in steadystate using a
combination of forward and slowdecay. The absence of
fastdecay in this mode, guarantees the lowest possible
currentripple “by design”. For transients to lower current
levels, fastdecay is automatically activated to allow
highspeed response. The selection of fast or slow decay is
completely transparent for the user and no additional
parameters are required for operation.
Icoil
Set value
Actual value
0
TPWM
t
Forward & Slow Decay
Fast Decay & Forward
Forward & Slow Decay
Figure 7. Forward & Slow/Fast Decay PWM
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