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PDF EN25S80 Data sheet ( Hoja de datos )
| Número de pieza | EN25S80 | |
| Descripción | 8 Megabit 1.8V Serial Flash Memory | |
| Fabricantes | Eon Silicon Solution | |
| Logotipo |  |
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EN25S80
EN25S80
8 Megabit 1.8V Serial Flash Memory with 4Kbyte Uniform Sector
FEATURES
• Single power supply operation
- Full voltage range: 1.65-1.95 volt
• Serial Interface Architecture
- SPI Compatible: Mode 0 and Mode 3
• 8 M-bit Serial Flash
- 8 M-bit/1024 K-byte/4096 pages
- 256 bytes per programmable page
• Standard or Dual SPI
- Standard SPI: CLK, CS#, DI, DO, WP#, HOLD#
- Dual SPI: CLK, CS#, DQ0, DQ1, WP#, HOLD#
• High performance
- 75MHz clock rate for one data bit
- 50MHz clock rate for two data bits
• Low power consumption
- 7 mA typical active current
- 1 μA typical power down current
• Uniform Sector Architecture:
- 256 sectors of 4-Kbyte
- 16 blocks of 64-Kbyte
- Any sector or block can be erased individually
• Software and Hardware Write Protection:
- Write Protect all or portion of memory via
software
- Enable/Disable protection with WP# pin
• High performance program/erase speed
- Page program time: 1.3ms typical
- Sector erase time: 90ms typical
- Block erase time 500ms typical
- Chip erase time: 5 Seconds typical
• Lockable 256 byte OTP security sector
• Minimum 100K endurance cycle
• Package Options
- 8 pins SOP 150mil body width
- 8 pins SOP 200mil body width
- 8 contact VDFN
- All Pb-free packages are RoHS compliant
• Industrial temperature Range
GENERAL DESCRIPTION
The EN25S80 is an 8 Megabit (1024K-byte) Serial Flash memory, with advanced write protection
mechanisms. The EN25S80 supports the standard Serial Peripheral Interface (SPI), and a high
performance Dual output as well as Dual I/O using SPI pins: Serial Clock, Chip Select, Serial DQ0(DI)
and DQ1(DO). SPI clock frequencies of up to 50MHz are supported allowing equivalent clock rates of
100MHz for Dual Output when using the Dual Output Fast Read instructions. The memory can be
programmed 1 to 256 bytes at a time, using the Page Program instruction.
The EN25S80 also offers a sophisticated method for protecting individual blocks against erroneous or
malicious program and erase operations. By providing the ability to individually protect and unprotect
blocks, a system can unprotect a specific block to modify its contents while keeping the remaining
blocks of the memory array securely protected. This is useful in applications where program code is
patched or updated on a subroutine or module basis, or in applications where data storage segments
need to be modified without running the risk of errant modifications to the program code segments.
The EN25S80 is designed to allow either single Sector/Block at a time or full chip erase operation. The
EN25S80 can be configured to protect part of the memory as the software protected mode. The device
can sustain a minimum of 100K program/erase cycles on each sector or block.
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
1
©2004 Eon Silicon Solution, Inc.,
Rev. D, Issue Date: 2009/05/15
www.eonssi.com
www.DataSheet.in
1 page  
EN25S80
MEMORY ORGANIZATION
The memory is organized as:
z 1,048,576 bytes
z Uniform Sector Architecture
16 blocks of 64-Kbyte
256 sectors of 4-Kbyte
z 4096 pages (256 bytes each)
Each page can be individually programmed (bits are programmed from 1 to 0). The device is Sector,
Block or Chip Erasable but not Page Erasable.
Table 2. Uniform Block Sector Architecture
Block
Sector
255 0FF000h
15
240 0F0000h
239 0EF000h
14
224 0E0000h
223 0DF000h
13
208 0D0000h
207 0CF000h
12
192 0C0000h
191 0BF000h
11
176 0B0000h
175 0AF000h
10
160 0A0000h
159 09F000h
9
144 090000h
143 08F000h
8
128 080000h
127 07F000h
7
112 070000h
111 06F000h
6
96 060000h
95 05F000h
5
80 050000h
79 04F000h
4
64 040000h
63 03F000h
3
48 030000h
47 02F000h
2
32 020000h
31 01F000h
1
16 010000h
15 00F000h
Address range
0FFFFFh
0F0FFFh
0EFFFFh
0E0FFFh
0DFFFFh
0D0FFFh
0CFFFFh
0C0FFFh
0BFFFFh
0B0FFFh
0AFFFFh
0A0FFFh
09FFFFh
090FFFh
08FFFFh
080FFFh
07FFFFh
070FFFh
06FFFFh
060FFFh
05FFFFh
050FFFh
04FFFFh
040FFFh
03FFFFh
030FFFh
02FFFFh
020FFFh
01FFFFh
010FFFh
00FFFFh
4
03
2
1
0
004000h
003000h
002000h
001000h
000000h
004FFFh
003FFFh
002FFFh
001FFFh
000FFFh
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
5
©2004 Eon Silicon Solution, Inc.,
Rev. D, Issue Date: 2009/05/15
www.eonssi.com
www.DataSheet.in
5 Page 
Table 4B. Instruction Set (Read Instruction)
EN25S80
Instruction Name
Read Data
Fast Read
Byte 1
Code
03h
0Bh
Byte 2
A23-A16
A23-A16
Byte 3
A15-A8
A15-A8
Dual Output Fast
Read
3Bh
Dual I/O Fast Read BBh
A23-A16 A15-A8
A7-A0,
A23-A8(2) dummy (2)
Byte 4
A7-A0
A7-A0
A7-A0
Byte 5
(D7-D0)
dummy
dummy
(D7-D0, …) (1)
Byte 6
n-Bytes
(Next byte)
(D7-D0)
(D7-D0, …) (1)
continuous
(Next Byte)
continuous
(one byte
per 4 clocks,
continuous)
(one byte
per 4 clocks,
continuous)
Notes:
1. Dual Output data
DQ0 = (D6, D4, D2, D0)
DQ1 = (D7, D5, D3, D1)
2. Dual Input Address
DQ0 = A22, A20, A18, A16, A14, A12, A10, A8 ; A6, A4, A2, A0, dummy 6, dummy 4, dummy 2, dummy 0
DQ1 = A23, A21, A19, A17, A15, A13, A11, A9 ; A7, A5, A3, A1, dummy 7, dummy 5, dummy 3, dummy 1
Table 5. Manufacturer and Device Identification
OP Code
ABh
90h
9Fh
(M7-M0)
1Ch
1Ch
(ID15-ID0)
3814h
(ID7-ID0)
73h
73h
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
11
©2004 Eon Silicon Solution, Inc.,
Rev. D, Issue Date: 2009/05/15
www.eonssi.com
www.DataSheet.in
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet EN25S80.PDF ] | |
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