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PDF RJE0616JSP Data sheet ( Hoja de datos )
| Número de pieza | RJE0616JSP | |
| Descripción | Silicon P Channel MOS FET Series Power Switching | |
| Fabricantes | Renesas Technology | |
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Preliminary Datasheet
RJE0616JSP
Silicon P Channel MOS FET Series
Power Switching
REJ03G1944-0100
Rev.1.00
Jul 01, 2010
Description
This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in
over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of
high junction temperature like applying over power consumption, over current etc..
Features
For Automotive applications
Built-in the over temperature shut-down circuit.
High endurance capability against to the short circuit.
Latch type shut down operation (need 0 voltage recovery).
Built-in the current limitation circuit.
Low on-resistance RDS(on) : 77 m Typ, 90 m Max (VGS = –10 V)
High density mounting
AEC-Q101 compliant
Outline
RENESAS Package code: PRSP0008DD-D
(Package name: SOP-8)
8 7 65
1 234
4
G
Gate Resistor
Current
Limitation
Circuit
Temperature
Sensing
Circuit
Latch
Circuit
Gate
Shut-down
Circuit
DDDD
5678
1, 2, 3
4
5, 6, 7, 8
Source
Gate
Drain
123
SSS
Absolute Maximum Ratings
Item
Symbol
Ratings
Drain to source voltage
Gate to source voltage
Drain current
Body-drain diode reverse drain current
Avalanche current
Avalanche energy
Channel dissipation
VDSS
VGSS
VGSS
ID Note3
IDR
IAP Note 2
EAR Note 2
Pch Note 1
–60
–16
2.5
–4
–4
–4
68.6
2.5
Channel temperature
Tch 150
Storage temperature
Tstg –55 to +150
Notes: 1 When using the glass epoxy board (FR4 40 40 1.6 mm), PW 10 s
2. Tch = 25C, Rg 50
3. It provides by the current limitation lower bound value.
(Ta = 25°C)
Unit
V
V
V
A
A
A
mJ
W
C
C
REJ03G1944-0100 Rev.1.00
Jul 01, 2010
www.DataSheet.in
Page 1 of 7
1 page  
RJE0616JSP
Shutdown Case Temperature vs.
Gate to Source Voltage
200
180
160
140
120 ID = −0.5 A
dv / dt
VGS ≥ 500 V/ ms
100
0 −2 −4 −6 −8 −10
Gate to Source Voltage VGS (V)
Preliminary
Normalized Transient Thermal Impedance vs. Pulse Width
10
1 D=1
0.5
0.2
0.1 0.1
0.05
0.02
0.01 0.01
1shot pulse
0.001
100 μ
1m
θch − f(t) = γs (t) • θch − f
θch − f = 83.3°C/W, Ta = 25°C
When using the glass epoxy board
(FR4 40 × 40 × 1.6 mm)
PDM
PW
T
D=
PW
T
10 m 100 m 1
10
Pulse Width PW (S)
100 1000 10000
Vin
–10 V
Avalanche Test Circuit
VDS
Monitor
Rg
50 Ω
L
IAP
Monitor
D.U.T
VDD
Avalanche Waveform
EAR =
1
2
• L • IAP2 •
VDSS
VDSS – VDD
IAP
ID
V(BR)DSS
VDS
VDD
0
REJ03G1944-0100 Rev.1.00
Jul 01, 2010
www.DataSheet.in
Page 5 of 7
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet RJE0616JSP.PDF ] | |
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