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PDF R2J25953 Data sheet ( Hoja de datos )
| Número de pieza | R2J25953 | |
| Descripción | H-Bridge Control High Speed Power Switching | |
| Fabricantes | Renesas Technology | |
| Logotipo |  |
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Preliminary Datasheet
R2J25953
H-Bridge Control High Speed Power Switching
with Built-in Driver IC and Power MOS FET
R07DS0044EJ0300
Rev.3.00
Sep 01, 2010
Description
The R2J25953 multi-chip module incorporates high-side Pch MOS FET, low-side Nch MOS FET, and Bi-CMOS driver
in a single HSOP-36 package.
Features
For Automotive application
Built-in low on state resistance MOS FET.
(Pch: 16 m Max., Nch: 11 m Max.)
Pch MOS FET is adopted on the high-side, and the charge pump noise was lost.
Built-in protection circuit of Thermal shut-down (TSD), Low Voltage Inhit (LVI), Overvoltage Detection (OVD)
and Overcurrent Detection.
Built-in diagnostic function.
Built-in cross-conduction protection.
Small Surface mounting package: HSOP-36
Block Diagram
Reverce battery
protection device
VBAT Vz
Cp
VB1
M
VBS1
VCC VBS2
VB2
OUT1
Pch MOS
Dr.
Dr.
Nch MOS
LVI, OVD
Overcurrent detection
TSD
Logic
Pch MOS
Dr.
OUT2
Dr.
Nch MOS
PGND1
PWM INA INB DIAG LGND
V30
C1
PGND2
Pull-up in the Microcomputer
R1 power supply
Microcomputer
R07DS0044EJ0300 Rev.3.00
Sep 01, 2010
www.DataSheet.in
Page 1 of 16
1 page  
R2J25953
Preliminary
Truth table
The operation of OUT1, OUT2, and DIAG is shown in the following.
Input
Status
Output
PWM INA INB LVI TSD Overcurrent OVD
detection
OUT1 OUT2
DIAG
High High High
off
High
High
High
Low off
High Low High
Low High
off
Low High High
Low off
Low Low High
Low High High
off
Hi-z Hi-z High
Low off
Hi-z Low High
Low High
off
Low Hi-z High
Low Protection circuit doesn't operate
Low Low High
Excluding All = Low
on
x
x
x Hi-z Hi-z High
At least one of PWM,
INA, and INB is high.
off
off
on
x
x
on
x Hi-z Hi-z Low
x Hi-z Hi-z Low
(Latch) (Latch) (Latch)
off x x on Hi-z Hi-z Low
Notes 1. x: Regardless of High, Low, on and off.
2. Protect circuit
off = undetection
on = detection
3. State of pin OUT
Low: Nch MOS FET ON, High: Pch MOS FET ON, Hi-z: Nch and Pch MOS FET OFF
4. The latch of overcurrent detection is released when LVI = on or INA = INB = Low.
State
ACTIVE
STANDBY
LVI
TSD
Overcurrent
detection
OVD
External Parts List
Parts No.
Cp
R1
C1
Recommended value
10 F
> 10 k
0.033 F
Purpose
Power supply bypass capacitor
Pull up Pin DIAG
Pin V30 bypass capacitor
R07DS0044EJ0300 Rev.3.00
Sep 01, 2010
www.DataSheet.in
Page 5 of 16
5 Page 
R2J25953
Ron High side vs. Ta
20 VCC = 12 V, ILoad = 15 A
18
16
14
12
10
8
6
4
2
0
-40 -20 0 20 40 60 80 100 120140 160
Ta (°C)
Overcurrent Detection vs. Ta (Short to GND)
100 VCC = 12 V
90
80
70
60
50
40
30
-40 -20 0 20 40 60 80 100 120140 160
Ta (°C)
Turn-on Delay Time (tpLH) vs. Ta
PWM = 20 kHz, INA = High, INB = Low,
5 Io = 5 A
4
3
2
1
0
-40 -20 0 20 40 60 80 100 120140 160
Ta (°C)
Preliminary
Ron Low side vs. Ta
16 VCC = 12 V, ILoad = 15 A
14
12
10
8
6
4
2
0-40 -20 0 20 40 60 80 100 120140 160
Ta (°C)
Overcurrent Detection vs. Ta (Short to VB)
100 VCC = 12 V
90
80
70
60
50
40
30
-40 -20 0 20 40 60 80 100 120140 160
Ta (°C)
Turn-off Delay Time (tpHL) vs. Ta
PWM = 20 kHz, INA = High, INB = Low,
5 Io = 5 A
4
3
2
1
0
-40 -20 0 20 40 60 80 100 120140 160
Ta (°C)
R07DS0044EJ0300 Rev.3.00
Sep 01, 2010
www.DataSheet.in
Page 11 of 16
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet R2J25953.PDF ] | |
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