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TC55VZM216AFTN08 fiches techniques PDF

Toshiba Semiconductor - 16-BIT CMOS STATIC RAM

Numéro de référence TC55VZM216AFTN08
Description 16-BIT CMOS STATIC RAM
Fabricant Toshiba Semiconductor 
Logo Toshiba Semiconductor 





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TC55VZM216AFTN08 fiche technique
TC55VZM216AJJN/AFTN08,10,12
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
262,144-WORD BY 16-BIT CMOS STATIC RAM
DESCRIPTION
The TC55VZM216AJJN/AFTN is a 4,194,304-bit high-speed static random access memory (SRAM) organized as
262,144 words by 16 bits. Fabricated using CMOS technology and advanced circuit techniques to provide high
speed, it operates from a single 3.3 V power supply. Chip enable ( CE ) can be used to place the device in a
low-power mode, and output enable ( OE ) provides fast memory access. Data byte control signals ( LB , UB ) provide
lower and upper byte access. This device is well suited to cache memory applications where high-speed access and
high-speed storage are required. All inputs and outputs are directly LVTTL compatible. The
TC55VZM216AJJN/AFTN is available in plastic 44-pin SOJ and TSOP with 400mil width for high density surface
assembly.
FEATURES
Fast access time (the following are maximum values)
TC55VZM216AJJN/AFTN08:8 ns
TC55VZM216AJJN/AFTN10:10 ns
TC55VZM216AJJN/AFTN12:12 ns
Low-power dissipation (IDDO2)
(the following are maximum values)
Cycle Time
8 10 12 ns
Operation (max) 140 130 120
Standby:4 mA (both devices)
mA
Single power supply voltage of 3.3 V ± 0.3 V
Fully static operation
All inputs and outputs are LVTTL compatible
Output buffer control using OE
Data byte control using LB (I/O1 to I/O8) and
UB (I/O9 to I/O16)
Package:
SOJ44-P-400-1.27 (AJJN) (Weight: 1.64 g typ)
TSOP II44-P-400-0.80 (AFTN) (Weight: 0.45 g typ)
PIN ASSIGNMENT (TOP VIEW)
44 PIN SOJ
44 PIN TSOP
A4
A3
A2
A1
A0
CE
I/O1
I/O2
I/O3
I/O4
VDD
GND
I/O5
I/O6
I/O7
I/O8
WE
A15
A14
A13
A12
A16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44 A5
A4
43 A6
A3
42 A7
A2
41 OE
A1
40 UB
A0
39 LB
CE
38 I/O16 I/O1
37 I/O15 I/O2
36 I/O14 I/O3
35 I/O13 I/O4
34 GND VDD
33 VDD GND
32 I/O12 I/O5
31 I/O11 I/O6
30 I/O10 I/O7
29 I/O9 I/O8
28 NU
WE
27 A8
A15
26 A9
A14
25 A10 A13
24 A11 A12
23 A17 A16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44 A5
43 A6
42 A7
41 OE
40 UB
39 LB
38 I/O16
37 I/O15
36 I/O14
35 I/O13
34 GND
33 VDD
32 I/O12
31 I/O11
30 I/O10
29 I/O9
28 NU
27 A8
26 A9
25 A10
24 A11
23 A17
(TC55VZM216AJJN)
(TC55VZM216AFTN)
PIN NAMES
A0 to A17 Address Inputs
I/O1 to I/O16 Data Inputs/Outputs
CE Chip Enable Input
WE Write Enable Input
OE Output Enable Input
LB , UB Data Byte Control Inputs
VDD Power (+3.3 V)
GND
Ground
NU Not Usable (Input)
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2003-01-17 1/11

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