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XZ1001-BD fiches techniques PDF

M/a-com - highly integrated transmit/receive 4 port core chip

Numéro de référence XZ1001-BD
Description highly integrated transmit/receive 4 port core chip
Fabricant M/a-com 
Logo M/a-com 





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XZ1001-BD fiche technique
DataSheet.in
XZ1001-BD
2.5-4.0 GHz GaAs MMIC
S-Band Core
Rev 01-Sep-10
Features
• Highly Integrated Core Chip
• Transmit and Receive Modes of Operation
• Integrated T/R Switches, LNA and Driver Amplifier
• 6-Bit Phase Shifter and 6-Bit Attenuator
• 33.0 dB Small Signal RX Gain
• +20 dBm TX P1dB Compression Point
• Compensated On-Chip Gate Bias Circuit
• 100% On-Wafer RF, DC and Output Power Testing
• 100% Visual Inspection to MIL-STD-883 Method 2010
General Description
The XZ1001-BD is a highly integrated transmit/receive 4 port core
chip. It is designed for applications operating within the 2.5 to 4
GHz range. The core consists of integrated transmit/receive
switches, LNA, 6-bit phase shifter, 6-bit attenuator and driver
amplifier. The digital control logic allows fast phase shifter and
attenuator changes. The chip has surface passivation to protect
and provide a rugged part with backside via holes and gold
metallization to allow either a conductive epoxy or eutectic solder
die attach process. This device is well suited for phased array
radar applications.
Chip Device Layout
XZ1001-BD
Absolute Maximum Ratings
Supply Voltage (Vd)
8V
Gate Supply (Vs)
TBD
Logic Supply (Vl)
5V
Supply Current (Id)
676 mA
Input Power
TBD
Storage Temperature (Tstg) -65 to +165 ºC
Operating Temperature (Ta) -55 to MTTF
Channel Temperature
TBD
Channel temperature affects a device's MTTF. It is recommended
to keep channel temperature as low as possible for maximum life.
Electrical Characteristics (Ambient Temperature T=25 oC)
Parameter
Frequency Range (f)
Input Return Loss RX/TX Mode (S11)
Output Return Loss RX/TX Mode (S22)
Receive/Transmit Small Signal Gain (S21)
Receive/Transmit Output Power for 1 dB Compression Point
Receive Noise Figure (NF)
Receive Output Third Order Intercept (OIP3)
Phase Shifter Range (6 Bit, 64 states, 5.625 deg step)
Phase Shifter RMS Phase Error
Phase Shifter RMS Amplitude Error
Attenuator Range (6 Bit, 64 states, 0.45 dB step)
Attenuator RMS Amplitude Error
Attenuator RMS Phase Error
Drain Bias Voltage (Vd1,2)
Drain Bias Voltage (Vd3)
Gate Bias Voltage (Vs1,2)
Control Voltage High (I1A,2,3,4,5,56) & (I1P2,3,4,5,6)
Control Voltage Low (I1A,2,3,4,5,56) & (I1P2,3,4,5,6)
Supply Current (Id1) [Vs(1,2)=-10V, VD(1,2)=5V, VD3=7V]
Supply Current (Id2) [Vs(1,2)=-10V, VD(1,2)=5V, VD3=7V]
Supply Current (Id3) [Vs(1,2)=-10V, VD(1,2)=5V, VD3=7V]
Units
GHz
dB
dB
dB
dBm
dB
dBm
deg
deg
dB
dB
dB
deg
VDC
VDC
VDC
VDC
VDC
mA
mA
mA
Min.
2.5
0
0
-
0.5
+2.0
0.0
Typ.
-10
-15
33
20
2.5
TBD
1.5
0.7
0.3
1.5
5
7
-10
+3.3
22
60
270
Max.
4
354.375
28.35
-
+5.0
+0.8
Page 1 of 11
ADVANCED: Data sheets contain information regarding a product M/A-COM Tech Asia is
considering for development. Performance is based on target specifications, simulated results,
and/or prototype measurements. Commitment to develop is not guaranteed.
PRELIMINARY: Data sheets contain information regarding a product M/A-COM Tech Asia has
under development. Performance is based on engineering tests. Specifications are typical.
Mechanical outline has been fixed. Engineering samples and/or test data may be available.
Commitment to produce in volume is not guaranteed.
3F, 3-2 Industry East IX Road, Science-Based Industrial Park
Hsinchu 30075 Taiwan, R.O.C
Tel +886-3-567-9680 / Fax +886-3-567-9433
Visit macomtechasia.com for additional data sheets and product information.
Characteristic data and specifications are subject to change without notice.
©2010 M/A-COM Tech Asia

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