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PDF BIT3251 Data sheet ( Hoja de datos )
| Número de pieza | BIT3251 | |
| Descripción | Low Cost PWM Controller | |
| Fabricantes | Beyond Innovation Technology | |
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DataSheet.in
Beyond Innovation Technology Co., Ltd.
BIT3251
BIT3251
Low Cost PWM Controller
Version: A0
Please read the notice stated in this preamble carefully
before accessing any contents of the document attached.
Admission of BiTEK’s statement therein is presumed once
the document is released to the receiver.
碩頡科技 BiTEK
管 May 16, 2007 制
DCC CONTROLLED
2006/7/7
Confidential, for authorized user only
page 1 of 7
DOC NO.W-DS-0034
1 page  
DataSheet.in
Beyond Innovation Technology Co., Ltd.
DC/AC Characteristics:
BIT3251
Parameter
Reference Voltage
Output voltage
Line regulation
Under Voltage Look Out
Upper threshold voltage
Hysteresis
Ramp Wave Generator
Frequency
Output peak (Internal )
Output valley (Internal)
Error Amplifier
Open loop gain
Unit gain band width
Over Voltage Protection
OVP threshold voltage
Enable Control
Turn on Threshold
Turn off Threshold
Output
CMOS output impedance
Maximum Duty Cycle
Rising Time
Falling Time
Test Conditions
Measured with shorted
INN CMP pins
VDD=5V, Ta=25°C
VDD=4 ~ 8V, Ta=25°C
Ta=25°C
Note2
Note 1
Note 1
VDD=5V, Ta=25°C
VDD=5V, Note 1
Min.
Typ.(Limits)
0.194
3.6
0.1
300
1.7
0.25
60
1
1.45
1.2
0.2
2
3.8
0.2
330
1.8
0.308
80
1.5
1.55
Note 1, Note 2
VDD=5V, Ta=25°C,
330KHz.
VDD=5V, 1000pF load,
Note 1, Note 2
90
50
93
65.5
88.5
Ta: ambient temperature.
Note 1. Only guaranteed by simulation or sampled evaluation during –40~+85°C. Not 100% tested.
Note 2. The voltages of the output drivers are pulled to GND in each off states.
Max.
Unit
0.206
V
20 mV
4.0 V
0.3 V
360
1.9
0.35
KHz
V
V
dB
MHz
1.65 V
V
0.8 V
Ω
95 %
ns
ns
Layout Notice:
Some of the pins are very sensitive to noise. Please follow the bellowing guideline to make the layout:
Note 1. Please keep the capacitor between VDD and GND as close as possible. Noisy IC VDD may trigger UVLO.
Note 2. Figure 2 is an example of making shortest traces between VDD and GND. The layout traces are under the IC.
2006/7/7
1
VDD
EA
CMP
INN
4
Figure 2
8
OUT
GND
NC
OVP
5
碩頡科技 BiTEK
管 May 16, 2007 制
DCC CONTROLLED
Confidential, for authorized user only
page 5 of 7
DOC NO.W-DS-0034
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet BIT3251.PDF ] | |
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