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PDF NCP3012 Data sheet ( Hoja de datos )
| Número de pieza | NCP3012 | |
| Descripción | Synchronous PWM Controller | |
| Fabricantes | ON Semiconductor | |
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NCP3012
www.DataSheet4U.com
Synchronous PWM Controller
The NCP3012 is a PWM device designed to operate from a wide
input range and is capable of producing an output voltage as low as
0.8 V. The NCP3012 provides integrated gate drivers and an internally
set 75 kHz oscillator. The NCP3012 has an externally compensated
transconductance error amplifier with an internally fixed soft−start.
The NCP3012 incorporates output voltage monitoring with a Power
Good pin to indicate that the system is in regulation. The dual function
SYNC pin synchronizes the device to a higher frequency (Slave
Mode) or outputs a 180° out−of−phase clock signal to drive another
NCP3012 (Master Mode). Protection features include lossless current
limit and short circuit protection, output overvoltage and undervoltage
protection, and input undervoltage lockout. The NCP3012 is available
in a 14−pin TSSOP package.
Features
• Input Voltage Range from 4.7 V to 28 V
• 75 kHz Operation
• 0.8 V $1.0% Reference Voltage
• Buffered External +1.25 V Reference
• Current Limit and Short Circuit Protection
• Power Good
• Enable/Disable Pin
• Input Undervoltage Lockout
• External Synchronization
• Output Overvoltage and Undervoltage Protection
• This is a Pb−Free Device
Typical Applications
• Set Top Box
• Power Modules
• ASIC / DSP Power Supply
VIN
CREF
CIN
EN
PG
VCC BST
HSDR
VSW
CBST
Q1
LO
VOUT
VREF
SYNC
LSDR
R ISET
GND
Q2 RFB1
CO
RFB2
RREF
COMP FB
RC
CC2
C C1
Figure 1. Typical Application Circuit
http://onsemi.com
14
1
TSSOP−14
DT SUFFIX
CASE 948G
MARKING DIAGRAM
14
3012
ALYWG
G
1
3012= Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
VREF
EN
NC
SYNC
PG
COMP
FB
PIN CONNECTIONS
(TOP VIEW)
VCC
BST
HSDR
VSW
NC
LSDR
GND
ORDERING INFORMATION
Device
Package
Shipping†
NCP3012DTBR2G TSSOP−14 2500 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2010
May, 2010 − Rev. 0
1
Publication Order Number:
NCP3012/D
1 page  
NCP3012
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ELECTRICAL CHARACTERISTICS (−40°C < TJ < +125°C, VCC = 12 V, for min/max values unless otherwise noted)
Characteristic
Conditions
Min Typ Max Unit
Input Voltage Range
− 4.7 28 V
SUPPLY CURRENT
Quiescent Supply Current
VCC Supply Current
VCC Supply Current
UNDER VOLTAGE LOCKOUT
UVLO Rising Threshold
UVLO Falling Threshold
OSCILLATOR
Oscillator Frequency
Ramp−Amplitude Voltage
Ramp Valley Voltage
EN = 0 VCC = 12 V
VFB = 0.75 V, Switching, VCC = 4.7 V
VFB = 0.75 V, Switching, VCC = 28 V
− 2.5 4.0
− 5.8 8.0
− 6.0 12
VCC Rising Edge
VCC Falling Edge
3.8 4.3 4.7
3.5 4.0 4.3
TJ = +25°C, 4.7 V v VCC v 28 V
65 75 85
TJ = −40°C to +125°C, 4.7 V v VCC v 28 V
62
75
88
Vpeak − Valley
− 1.5 −
0.44 0.8 0.96
mA
mA
mA
V
V
kHz
kHz
V
V
PWM
Minimum Duty Cycle
Maximum Duty Cycle
Soft Start Ramp Time
EXTERNAL VOLTAGE REFERENCE
VREF Voltage
VREF Line Regulation
VREF Load Regulation
Short Circuit Output Current
ENABLE
Enable Threshold High
Enable Threshold Low
Enable Source Current
POWER GOOD
Power Good High Threshold
Power Good Low Threshold
Power Good Low Voltage
SYNC
SYNC Input High Threshold
SYNC Output High
SYNC Output Low
Phase Delay
SYNC Drive Current (Sourcing)
Master Threshold Current
Master Frequency
VFB = VCOMP
IREF = 1 mA
VCC = 4.7 V − 28 V
IREF = 0 mA to 1.5 mA
VREF = 0 V
VCC = 12 V
VCC = 12 V
VCC = 12 V, IPG = 4 mA
10 mA load
(Note 4)
−7
82 86
− 14
−
−
−
1.14 1.25 1.35
−1 − +1
−2 −0.2 +2
4.5 5.7 7.0
− − 3.4
1.0 −
−
20 50 90
0.72 0.89 1.06
0.65 0.71 0.75
0.13 0.22 0.35
− − 2.0
− 5.0 −
− 90 −
− 200 −
− 1.6 −
5.0 14.4 25
70 85 100
%
%
ms
V
%
%
mA
V
V
mA
V
V
V
V
V
mV
°
mA
mA
kHz
4. Guaranteed by design.
5. The voltage sensed across the high side MOSFET during conduction.
6. This assumes 100 pF capacitance to ground on the COMP Pin and a typical internal Ro of > 10 MW.
7. This is not a protection feature.
http://onsemi.com
5
5 Page 
NCP3012
Startup and Shutdown
Once enable is asserted the device begins its startup
process. Closed−loop soft−start begins after a 400 ms delay
wherein the boost capacitor is charged, and the current limit
threshold is set. During the 400 ms delay the OTA output is
set to just below the valley voltage of the internal ramp. This
is done to reduce delays and to ensure a consistent pre
soft−start condition. The device increases the internal
reference from 0 V to 0.8 V in 32 discrete steps while
maintaining closed loop regulation at each step. Some
overshoot may be evident at the start of each step depending
on the voltage loop phase margin and bandwidth. See
Figure 19. The total soft−start time is 14 ms.
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The soft−stop process begins once the EN pin voltage
goes below the input low threshold. Soft−stop decreases the
internal reference from 0.8 V − 0 V in 32 steps as with
Soft−Start. Soft−Stop finishes with one “last” high side gate
pulse at half the period of the prior pulse. This helps ensure
positive inductor current following turn off at light loads,
which prevents negative output voltage.
Enable low during Soft−Start will result in Soft−Stop
down counting from that step. Likewise, Enable high during
Soft−Stop will result in Soft−Start up counting from that
step.
0.8 V Output Voltage
25 mV Steps
32 Voltage Steps
Internal Reference Voltage
Internal Ramp
OTA Output
0 .7V
0V
Figure 19. Soft−Start Details
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11
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| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet NCP3012.PDF ] | |
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