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Numéro de référence | UJA1079A | ||
Description | LIN core system basis chip | ||
Fabricant | NXP Semiconductors | ||
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UJA1079A
LIN core system basis chip
Rev. 2 — 31 January 2011
Product data sheet
1. General description
The UJA1079A core System Basis Chip (SBC) replaces the basic discrete components
commonly found in Electronic Control Units (ECU) with a Local Interconnect Network
(LIN) interface.
The UJA1079A supports the networking applications used to control power and sensor
peripherals by using the LIN interface as a local sub-bus.
The core SBC contains the following integrated devices:
• LIN transceiver compliant with LIN 2.1, LIN 2.0 and SAE J2602, and compatible with
LIN 1.3
• Advanced independent watchdog (UJA1079A/xx/WD versions)
• 250 mA voltage regulator for supplying a microcontroller; extendable with external
PNP transistor for increased current capability and dissipation distribution
• Serial Peripheral Interface (SPI) (full duplex)
• 2 local wake-up input ports
• Limp home output port
In addition to the advantages gained from integrating these common ECU functions in a
single package, the core SBC offers an intelligent combination of system-specific
functions such as:
• Advanced low-power concept
• Safe and controlled system start-up behavior
• Detailed status reporting on system and sub-system levels
The UJA1079A is designed to be used in combination with a microcontroller. The SBC
ensures that the microcontroller always starts up in a controlled manner.
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Pages | Pages 30 | ||
Télécharger | [ UJA1079A ] |
No | Description détaillée | Fabricant |
UJA1079 | LIN core system basis chip | NXP Semiconductors |
UJA1079A | LIN core system basis chip | NXP Semiconductors |
UJA1079ATW | LIN core system basis chip | NXP Semiconductors |
UJA1079TW | LIN core system basis chip | NXP Semiconductors |
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TSPC106 | PCI Bus Bridge Memory Controller | ATMEL |
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