ADP3208C Datasheet PDF - ON Semiconductor
| Part Number | ADP3208C | |
| Description | CPU Synchronous Buck Controller | |
| Manufacturers | ON Semiconductor | |
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Preliminary
7-Bit,Programmablwwew.D,ataSDheetu4U.caom l-
Phase,Mobile,CPU,Synchronous
Buck Controller
ADP3208C
FEATURES
Single-chip solution
Fully compatible with the Intel® IMVP-6+™ specifications
Integrated MOSFET drivers
Input Voltage Range of 3.3 V to 22 V
Selectable 1- or 2-phase operation with up to 1 MHz per
phase switching frequency
Guaranteed ±8 mV worst-case differentially sensed core
voltage error over temperature
Automatic power-saving mode maximizes efficiency with
light load during deeper sleep operation
Soft transient control reduces inrush current and audio noise
Active current balancing between output phases
Independent current limit and load line setting inputs for
additional design flexibility
Built-in power-good blanking supports
voltage identification (VID) on-the-fly transients
7-bit, digitally programmable DAC with 0.3 V to 1.5 V output
Short-circuit protection with latch-off delay
Clock enable output delays the CPU clock until the core
voltage is stable
Output load current monitor
48-lead LFCSP
APPLICATIONS
Notebook power supplies for next-generation Intel processors
GENERAL DESCRIPTION
The ADP3208C is a highly efficient, multiphase, synchronous
buck switching regulator controller. With its integrated drivers,
the ADP3208C is optimized for converting the notebook
battery voltage into the core supply voltage required by high
performance Intel processors. An internal 7-bit DAC is used to
read a VID code directly from the processor and to set the CPU
core voltage to a value within the range of 0.3 V to 1.5 V. The
phase relationship of the output signals ensures interleaved 2-
phase operation.
The ADP3208C uses a multimode architecture run at a
programmable switching frequency and optimized for efficiency
depending on the output current requirement. The ADP3208C
switches between single- and dual-phase operation to maximize
efficiency with all load conditions. The chip includes a
programmable load line slope function to adjust the output voltage
as a function of the load current so that the core voltage is always
optimally positioned for a load transient. The ADP3208C also
provides accurate and reliable short-circuit protection,
adjustable current limiting, and a delayed power-good output.
The IC supports on-the-fly output voltage changes requested by
the CPU.
The ADP3208C is specified over the extended commercial
temperature range of -10°C to 100°C and is available in a 48-lead
LFCSP.
May 2008– Rev. 1
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ADP3208Cwww.DataSheet4U.com
Parameter
CSREF Crowbar Voltage
Threshold
CSREF Reverse Voltage
Threshold
Symbol
VCBCSREF
VRVCSREF
PWRGD Low Voltage
PWRGD High, Leakage
Current
PWRGD Start-up Delay
VPWRGD
IPWRGD
TSSPWRGD
PWRGD Latch-off Delay
TLOFFPWRGD
PWRGD Propagation Delay3 TPDPWRGD
Crowbar Latch-off Delay2
TLOFFCB
PWRGD Masking Time
CSREF Soft-stop Resistance
CURRENT CONTROL
CURRENT-SENSE AMPLIFIER
(CSAMP)
CSSUM, CSREF Common-
Mode Range2
CSSUM, CSREF Offset Voltage
VOSCSA
CSSUM Bias Current
CSREF Bias Current
CSCOMP Voltage Range2
CSCOMP Current
CSCOMP Slew Rate
IBCSSUM
IBCSRE
ICSCOMPsource
ICSCOMPsink
Gain Bandwidth2
GBWCSA
CURRENT MONITORING
and PROTECTION
CURRENT REFERENCE
IREF Voltage
CURRENT LIMITER (OCP)
Current Limit (OCP) Threshold
VREF
VLIMTH
Current Limit Latch-off Delay
CURRENT MONITOR
Current Gain Accuracy
IMON/ILIM
IMON Clamp Voltage
VMAXMON
Conditions
Relative to FBRTN
Relative to FBRTN, Latch-off mode
CSREF falling
CSREF rising
IPWRGD(SINK) = 4 mA
VPWRDG = 5 V
Measured from CLKEN neg edge to PWRGD pos
edge
Measured from Out-off-Good-Window event to
Latch-off (switching stops)
Measured from Out-off-Good-Window event to
PWRGD neg edge
Measured from Crowbar event to Latch-off
(switching stops)
Triggered by any VID change or OCP event
EN = L or Latch-off condition
Min Typ
1.57 1.7
Max Units
1.78 V
−350
−300
−70
50
8
8
200
200
100
70
mV
−5 mV
150 mV
0.1 μA
ms
ms
ns
ns
μs
Ω
Voltage range of interest
CSREF – CSSUM TA = –10 C to 85 C
TA = 25 C
Operating Range
CSCOMP = 2 V
CSSUM forced 200 mV below CSREF
CSSUM forced 200 mV above CSREF
CCSCOMP = 10 pF, Open Loop Configuration
CSSUM forced 200 mV below CSREF
CSSUM forced 200 mV above CSREF
Non-inverting unit gain configuration
RFB = 1 kOhm
0 2V
−1.7
−0.5
−50
−120
0.05
−750
1
+1.7
+0.5
+50
+120
2
mV
mV
nA
nA
V
μA
mA
10 V/μs
−10 V/μs
20 MHz
RREF = 80 kΩ to set IREF = 20 uA
1.55 1.6
1.65 V
Measured from CSCOMP to CSREF, RLIM = 4.5 kΩ,
2-ph configuration, PSI = H
2-ph configuration, PSI = L
1-ph configuration
Measured from OCP event to PWRGD de-assertion
−70
−32
−70
−95
−47.5
−95
8
−115 mV
−65 mV
−115 mV
ms
Measured from ILIMP to IMON
ILIM = −20 μA
ILIM = −10 μA
ILIM = −5 μA
Relative to FBRTN, ILIMP = -30 uA
Rev. 1 | Page 5 of 41 | www.onsemi.com
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Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for ADP3208C electronic component. |
| Information | Total 30 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ ADP3208C.PDF Datasheet ] | |
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